From: Linu Cherian <lcherian@marvell.com>
To: <suzuki.poulose@arm.com>, <mike.leach@linaro.org>, <james.clark@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<coresight@lists.linaro.org>, <linux-kernel@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <corbet@lwn.net>,
<devicetree@vger.kernel.org>, <sgoutham@marvell.com>,
<gcherian@marvell.com>
Subject: Re: [PATCH v13 0/8] Coresight for Kernel panic and watchdog reset
Date: Wed, 15 Jan 2025 15:50:35 +0530 [thread overview]
Message-ID: <20250115102035.GA1406221@hyd1403.caveonetworks.com> (raw)
In-Reply-To: <20241216053014.3427909-1-lcherian@marvell.com>
Hi Suzuki,
On 2024-12-16 at 11:00:06, Linu Cherian (lcherian@marvell.com) wrote:
> This patch series is rebased on coresight-next-v6.12.rc4
>
> * Patches 1 & 2 adds support for allocation of trace buffer pages from
> reserved RAM
> * Patches 3 & 4 adds support for saving metadata at the time of kernel panic
> * Patch 5 adds support for reading trace data captured at the time of panic
> * Patches 6 & 7 adds support for disabling coresight blocks at the time of panic
> * Patch 8: Gives the full description about this feature as part of documentation
Do you have any further feedback on this ?
Thanks.
>
> v12 is posted here,
> https://lore.kernel.org/linux-arm-kernel/20241129084714.3057080-1-lcherian@marvell.com/
>
> Changelog from v12:
> * Fixed wrong buffer pointer passed to coresigh_insert_barrier_packet
> * tmc_read_prepare/unprepare_crashdata need to be called only once and
> hence removed from read path and added to tmc_probe
> * tmc_read_prepare_crashdata renamed to tmc_prepare_crashdata and
> avoid taking locks as its moved to probe function.
> * Introduced read status flag, "reading" specific to reserved buffer to keep the
> reserved buffer reading independent of the regular buffer.
> * open/release ops for reserved buffer has to take care only about the
> set/unset the "reading" status flag as the reserved buffer is prepared
> during the probe time itself.
> * Few other trivial changes
>
> Changelog from v11:
> Convert all commands to literal code blocks, that was missed out in v11.
> No other code changes.
>
> Changelog from v10:
> * Converted all csdev_access_* to readl functions in tmc_panic_sync_*
> * Added "tmc" prefix for register snapshots in struct tmc_crash_metadata
> * Converted dev_info to dev_dbg in panic handlers
> * Converted dsb to dmb in panic handlers
> * Fixed marking metadata as invalid when a user is trying to use the
> reserved buffer. Earlier this was wrongly set at the time of reading
> reserved trace buffer.
> * Moved common validation checks to is_tmc_crashdata_valid and minor
> code rearrangements for efficiency
> * Got rid of sink specific prepare/unprepare invocations
> * Got rid of full from struct tmc_resrv_buf
> * While reading crashdata, size is now calculated from metadata instead
> of relying on reserved buffer size populated by dtb
> * Minor documenation fixes
>
> Changelog from v9:
> * Add common helper function of_tmc_get_reserved_resource_by_name
> for better code reuse
> * Reserved buffer validity and crashdata validity has been separated to
> avoid interdependence
> * New fields added to crash metadata: version, ffcr, ffsr, mode
> * Version checks added for metadata validation
> * Special file /dev/crash_tmc_xxx would be available only when
> crash metadata is valid
> * Removed READ_CRASHDATA mode meant for special casing crashdata reads.
> Instead, dedicated read function added for crashdata reads from reserved
> buffer which is common for both ETR and ETF sinks as well.
> * Documentation added to Documentation/tracing/coresight/panic.rst
>
> Changelog from v8:
> * Added missing exit path on error in __tmc_probe.
> * Few whitespace fixes, checkpatch fixes.
> * With perf sessions honouring stop_on_flush sysfs attribute,
> removed redundant variable stop_on_flush_en.
>
> Changelog from v7:
> * Fixed breakage on perf test -vvvv "arm coresight".
> No issues seen with and without "resrv" buffer mode
> * Moved the crashdev registration into a separate function.
> * Removed redundant variable in tmc_etr_setup_crashdata_buf
> * Avoided a redundant memcpy in tmc_panic_sync_etf.
> * Tested kernel panic with trace session started uisng perf.
> Please see the title "Perf based testing" below for details.
> For this, stop_on_flush sysfs attribute is taken into
> consideration while starting perf sessions as well.
>
> Changelog from v6:
> * Added special device files for reading crashdata, so that
> read_prevboot mode flag is removed.
> * Added new sysfs TMC device attribute, stop_on_flush.
> Stop on flush trigger event is disabled by default.
> User need to explicitly enable this from sysfs for panic stop
> to work.
> * Address parameter for panicstop ETM configuration is
> chosen as kernel "panic" address by default.
> * Added missing tmc_wait_for_tmcready during panic handling
> * Few other misc code rearrangements.
>
> Changelog from v5:
> * Fixed issues reported by CONFIG_DEBUG_ATOMIC_SLEEP
> * Fixed a memory leak while reading data from /dev/tmc_etrx in
> READ_PREVBOOT mode
> * Tested reading trace data from crashdump kernel
>
> Changelog from v4:
> * Device tree binding
> - Description is made more explicit on the usage of reserved memory
> region
> - Mismatch in memory region names in dts binding and driver fixed
> - Removed "mem" suffix from the memory region names
> * Rename "struct tmc_register_snapshot" -> "struct tmc_crash_metadata",
> since it contains more than register snapshot.
> Related variables are named accordingly.
> * Rename struct tmc_drvdata members
> resrv_buf -> crash_tbuf
> metadata -> crash_mdata
> * Size field in metadata refers to RSZ register and hence indicates the
> size in 32 bit words. ETR metadata follows this convention, the same
> has been extended to ETF metadata as well.
> * Added crc32 for more robust metadata and tracedata validation.
> * Added/modified dev_dbg messages during metadata validation
> * Fixed a typo in patch 5 commit description
>
> Changelog from v3:
> * Converted the Coresight ETM driver change to a named configuration.
> RFC tag has been removed with this change.
> * Fixed yaml issues reported by "make dt_binding_check"
> * Added names for reserved memory regions 0 and 1
> * Added prevalidation checks for metadata processing
> * Fixed a regression introduced in RFC v3
> - TMC Status register was getting saved wrongly
> * Reverted memremap attribute changes from _WB to _WC to match
> with the dma map attributes
> * Introduced reserved buffer mode specific .sync op.
> This fixes a possible crash when reserved buffer mode was used in
> normal trace capture, due to unwanted dma maintenance operations.
>
>
>
>
> Linu Cherian (8):
> dt-bindings: arm: coresight-tmc: Add "memory-region" property
> coresight: tmc-etr: Add support to use reserved trace memory
> coresight: core: Add provision for panic callbacks
> coresight: tmc: Enable panic sync handling
> coresight: tmc: Add support for reading crash data
> coresight: tmc: Stop trace capture on FlIn
> coresight: config: Add preloaded configuration
> Documentation: coresight: Panic support
>
> .../bindings/arm/arm,coresight-tmc.yaml | 26 ++
> Documentation/trace/coresight/panic.rst | 362 ++++++++++++++++++
> drivers/hwtracing/coresight/Makefile | 2 +-
> .../coresight/coresight-cfg-preload.c | 2 +
> .../coresight/coresight-cfg-preload.h | 2 +
> .../hwtracing/coresight/coresight-cfg-pstop.c | 83 ++++
> drivers/hwtracing/coresight/coresight-core.c | 42 ++
> .../hwtracing/coresight/coresight-tmc-core.c | 308 ++++++++++++++-
> .../hwtracing/coresight/coresight-tmc-etf.c | 92 ++++-
> .../hwtracing/coresight/coresight-tmc-etr.c | 184 ++++++++-
> drivers/hwtracing/coresight/coresight-tmc.h | 105 +++++
> include/linux/coresight.h | 12 +
> 12 files changed, 1208 insertions(+), 12 deletions(-)
> create mode 100644 Documentation/trace/coresight/panic.rst
> create mode 100644 drivers/hwtracing/coresight/coresight-cfg-pstop.c
>
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2025-01-15 10:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-16 5:30 Linu Cherian
2024-12-16 5:30 ` [PATCH v13 1/8] dt-bindings: arm: coresight-tmc: Add "memory-region" property Linu Cherian
2024-12-16 5:30 ` [PATCH v13 2/8] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian
2024-12-16 5:30 ` [PATCH v13 3/8] coresight: core: Add provision for panic callbacks Linu Cherian
2024-12-16 5:30 ` [PATCH v13 4/8] coresight: tmc: Enable panic sync handling Linu Cherian
2024-12-16 5:30 ` [PATCH v13 5/8] coresight: tmc: Add support for reading crash data Linu Cherian
2025-01-21 14:56 ` Suzuki K Poulose
2025-02-04 11:57 ` Linu Cherian
2024-12-16 5:30 ` [PATCH v13 6/8] coresight: tmc: Stop trace capture on FlIn Linu Cherian
2024-12-16 5:30 ` [PATCH v13 7/8] coresight: config: Add preloaded configuration Linu Cherian
2024-12-16 5:30 ` [PATCH v13 8/8] Documentation: coresight: Panic support Linu Cherian
2025-01-15 10:20 ` Linu Cherian [this message]
2025-01-24 12:08 ` [PATCH v13 0/8] Coresight for Kernel panic and watchdog reset James Clark
2025-02-04 12:02 ` Linu Cherian
2025-02-11 10:41 ` James Clark
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250115102035.GA1406221@hyd1403.caveonetworks.com \
--to=lcherian@marvell.com \
--cc=conor+dt@kernel.org \
--cc=corbet@lwn.net \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=gcherian@marvell.com \
--cc=james.clark@arm.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mike.leach@linaro.org \
--cc=robh@kernel.org \
--cc=sgoutham@marvell.com \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®