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From: Mark Brown <broonie@kernel.org>
To: Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	 Joey Gouly <joey.gouly@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Will Deacon <will@kernel.org>,
	 Paolo Bonzini <pbonzini@redhat.com>,
	Jonathan Corbet <corbet@lwn.net>,  Shuah Khan <shuah@kernel.org>
Cc: Dave Martin <Dave.Martin@arm.com>, Fuad Tabba <tabba@google.com>,
	 Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,  kvmarm@lists.linux.dev,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	 linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org,
	 Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 27/27] KVM: arm64: selftests: Add SME to set_id_regs test
Date: Fri, 14 Feb 2025 01:58:10 +0000	[thread overview]
Message-ID: <20250214-kvm-arm64-sme-v4-27-d64a681adcc2@kernel.org> (raw)
In-Reply-To: <20250214-kvm-arm64-sme-v4-0-d64a681adcc2@kernel.org>

Add coverage of the SME ID registers to set_id_regs, ID_AA64PFR1_EL1.SME
becomes writable and we add ID_AA64SMFR_EL1 and it's subfields.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 tools/testing/selftests/kvm/arm64/set_id_regs.c | 29 +++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testing/selftests/kvm/arm64/set_id_regs.c
index 217541fe653601a82697134c8d773e901a205cfe..16a4cd84f45472451479c6a5502c67adb4d64490 100644
--- a/tools/testing/selftests/kvm/arm64/set_id_regs.c
+++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c
@@ -138,6 +138,7 @@ static const struct reg_ftr_bits ftr_id_aa64pfr0_el1[] = {
 
 static const struct reg_ftr_bits ftr_id_aa64pfr1_el1[] = {
 	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, CSV2_frac, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, SME, 0),
 	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, SSBS, ID_AA64PFR1_EL1_SSBS_NI),
 	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, BT, 0),
 	REG_FTR_END,
@@ -182,6 +183,28 @@ static const struct reg_ftr_bits ftr_id_aa64mmfr2_el1[] = {
 	REG_FTR_END,
 };
 
+static const struct reg_ftr_bits ftr_id_aa64smfr0_el1[] = {
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, FA64, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, LUTv2, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, SMEver, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, I16I64, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F64F64, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, I16I32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, B16B16, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F16F16, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F8F16, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F8F32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, I8I32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F16F32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, B16F32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, BI32I32, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, F32F32, 0)
+,	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, SF8FMA, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, SF8DP4, 0),
+	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64SMFR0_EL1, SF8DP2, 0),
+	REG_FTR_END,
+};
+
 static const struct reg_ftr_bits ftr_id_aa64zfr0_el1[] = {
 	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ZFR0_EL1, F64MM, 0),
 	REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64ZFR0_EL1, F32MM, 0),
@@ -212,6 +235,7 @@ static struct test_feature_reg test_regs[] = {
 	TEST_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1),
 	TEST_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1),
 	TEST_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1),
+	TEST_REG(SYS_ID_AA64SMFR0_EL1, ftr_id_aa64smfr0_el1),
 	TEST_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1),
 };
 
@@ -228,6 +252,7 @@ static void guest_code(void)
 	GUEST_REG_SYNC(SYS_ID_AA64MMFR0_EL1);
 	GUEST_REG_SYNC(SYS_ID_AA64MMFR1_EL1);
 	GUEST_REG_SYNC(SYS_ID_AA64MMFR2_EL1);
+	GUEST_REG_SYNC(SYS_ID_AA64SMFR0_EL1);
 	GUEST_REG_SYNC(SYS_ID_AA64ZFR0_EL1);
 	GUEST_REG_SYNC(SYS_CTR_EL0);
 
@@ -675,8 +700,8 @@ int main(void)
 		   ARRAY_SIZE(ftr_id_aa64isar2_el1) + ARRAY_SIZE(ftr_id_aa64pfr0_el1) +
 		   ARRAY_SIZE(ftr_id_aa64pfr1_el1) + ARRAY_SIZE(ftr_id_aa64mmfr0_el1) +
 		   ARRAY_SIZE(ftr_id_aa64mmfr1_el1) + ARRAY_SIZE(ftr_id_aa64mmfr2_el1) +
-		   ARRAY_SIZE(ftr_id_aa64zfr0_el1) - ARRAY_SIZE(test_regs) + 2 +
-		   MPAM_IDREG_TEST;
+		   ARRAY_SIZE(ftr_id_aa64zfr0_el1) + ARRAY_SIZE(ftr_id_aa64smfr0_el1) - ARRAY_SIZE(test_regs) +
+		   2 + MPAM_IDREG_TEST;
 
 	ksft_set_plan(test_cnt);
 

-- 
2.39.5


  parent reply	other threads:[~2025-02-14  2:02 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-14  1:57 [PATCH v4 00/27] KVM: arm64: Implement support for SME in non-protected guests Mark Brown
2025-02-14  1:57 ` [PATCH v4 01/27] arm64/fpsimd: Update FA64 and ZT0 enables when loading SME state Mark Brown
2025-02-14  1:57 ` [PATCH v4 02/27] arm64/fpsimd: Decide to save ZT0 and streaming mode FFR at bind time Mark Brown
2025-02-14  1:57 ` [PATCH v4 03/27] arm64/fpsimd: Check enable bit for FA64 when saving EFI state Mark Brown
2025-02-14  1:57 ` [PATCH v4 04/27] arm64/fpsimd: Determine maximum virtualisable SME vector length Mark Brown
2025-02-14  1:57 ` [PATCH v4 05/27] KVM: arm64: Introduce non-UNDEF FGT control Mark Brown
2025-02-14  1:57 ` [PATCH v4 06/27] KVM: arm64: Pay attention to FFR parameter in SVE save and load Mark Brown
2025-02-14  1:57 ` [PATCH v4 07/27] KVM: arm64: Pull ctxt_has_ helpers to start of sysreg-sr.h Mark Brown
2025-02-14  1:57 ` [PATCH v4 08/27] KVM: arm64: Move SVE state access macros after feature test macros Mark Brown
2025-02-14  1:57 ` [PATCH v4 09/27] KVM: arm64: Rename SVE finalization constants to be more general Mark Brown
2025-02-14  1:57 ` [PATCH v4 10/27] KVM: arm64: Document the KVM ABI for SME Mark Brown
2025-02-14  1:57 ` [PATCH v4 11/27] KVM: arm64: Define internal features " Mark Brown
2025-02-14  1:57 ` [PATCH v4 12/27] KVM: arm64: Rename sve_state_reg_region Mark Brown
2025-02-14  1:57 ` [PATCH v4 13/27] KVM: arm64: Store vector lengths in an array Mark Brown
2025-02-14  1:57 ` [PATCH v4 14/27] KVM: arm64: Implement SME vector length configuration Mark Brown
2025-02-14  1:57 ` [PATCH v4 15/27] KVM: arm64: Support SME control registers Mark Brown
2025-02-14  1:57 ` [PATCH v4 16/27] KVM: arm64: Support TPIDR2_EL0 Mark Brown
2025-02-14  1:58 ` [PATCH v4 17/27] KVM: arm64: Support SME identification registers for guests Mark Brown
2025-02-14  1:58 ` [PATCH v4 18/27] KVM: arm64: Support SME priority registers Mark Brown
2025-02-14  1:58 ` [PATCH v4 19/27] KVM: arm64: Provide assembly for SME state restore Mark Brown
2025-02-14  1:58 ` [PATCH v4 20/27] KVM: arm64: Support userspace access to streaming mode Z and P registers Mark Brown
2025-02-14  1:58 ` [PATCH v4 21/27] KVM: arm64: Expose SME specific state to userspace Mark Brown
2025-02-14  1:58 ` [PATCH v4 22/27] KVM: arm64: Context switch SME state for normal guests Mark Brown
2025-02-14  1:58 ` [PATCH v4 23/27] KVM: arm64: Handle SME exceptions Mark Brown
2025-02-14  1:58 ` [PATCH v4 24/27] KVM: arm64: Expose SME to nested guests Mark Brown
2025-02-14  1:58 ` [PATCH v4 25/27] KVM: arm64: Provide interface for configuring and enabling SME for guests Mark Brown
2025-02-14  1:58 ` [PATCH v4 26/27] KVM: arm64: selftests: Add SME system registers to get-reg-list Mark Brown
2025-02-14  1:58 ` Mark Brown [this message]
2025-02-14  9:24 ` [PATCH v4 00/27] KVM: arm64: Implement support for SME in non-protected guests Marc Zyngier
2025-02-14 15:13   ` Mark Brown
2025-02-17  9:37     ` Marc Zyngier
2025-02-18 22:54       ` Mark Brown

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