* [PATCH] arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt
@ 2025-02-17 5:55 niravkumar.l.rabara
0 siblings, 0 replies; only message in thread
From: niravkumar.l.rabara @ 2025-02-17 5:55 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
niravkumar.l.rabara, nirav.rabara, devicetree, linux-kernel
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Add VGIC maintenance interrupt and interrupt-parent property for
interrupt controller, required to run Linux in virtualized environment.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..75397e84bd2c 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -75,8 +75,11 @@ intc: interrupt-controller@1d000000 {
#address-cells = <2>;
#size-cells = <2>;
interrupt-controller;
+ interrupt-parent = <&intc>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
+ /* VGIC maintenance interrupt */
+ interrupts = <GIC_PPI 25 IRQ_TYPE_LEVEL_HIGH>;
its: msi-controller@1d040000 {
compatible = "arm,gic-v3-its";
--
2.25.1
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2025-02-17 5:58 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2025-02-17 5:55 [PATCH] arm64: dts: socfpga: agilex5: add VGIC maintenance interrupt niravkumar.l.rabara
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®