* [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
@ 2025-02-24 17:07 Frank Li
2025-02-25 0:49 ` Hongxing Zhu
2025-02-25 20:12 ` Rob Herring (Arm)
0 siblings, 2 replies; 3+ messages in thread
From: Frank Li @ 2025-02-24 17:07 UTC (permalink / raw)
To: shawnguo2
Cc: Frank.Li, conor+dt, devicetree, festevam, hongxing.zhu, imx,
kernel, krzk+dt, linux-arm-kernel, linux-kernel, robh, s.hauer,
shawnguo
Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 51625bc9154ec..5800a381036bc 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
clock-output-names = "sai5_mclk";
};
+ clk_sys100m: clock-sys100m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ clock-output-names = "clk_sys100m";
+ };
+
osc_24m: clock-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
};
};
+ hsio_blk_ctl: syscon@4c0100c0 {
+ compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
+ reg = <0x0 0x4c0100c0 0x0 0x1>;
+ #clock-cells = <1>;
+ clocks = <&clk_sys100m>;
+ power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+ };
+
usb3_phy: phy@4c1f0040 {
compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
reg = <0x0 0x4c1f0040 0x0 0x40>,
@@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
@@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
2025-02-24 17:07 [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
@ 2025-02-25 0:49 ` Hongxing Zhu
2025-02-25 20:12 ` Rob Herring (Arm)
1 sibling, 0 replies; 3+ messages in thread
From: Hongxing Zhu @ 2025-02-25 0:49 UTC (permalink / raw)
To: Frank Li, shawnguo2
Cc: conor+dt, devicetree, festevam, imx, kernel, krzk+dt,
linux-arm-kernel, linux-kernel, robh, s.hauer, shawnguo
> -----Original Message-----
> From: Frank Li <frank.li@nxp.com>
> Sent: 2025年2月25日 1:08
> To: shawnguo2@yeah.net
> Cc: Frank Li <frank.li@nxp.com>; conor+dt@kernel.org;
> devicetree@vger.kernel.org; festevam@gmail.com; Hongxing Zhu
> <hongxing.zhu@nxp.com>; imx@lists.linux.dev; kernel@pengutronix.de;
> krzk+dt@kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; robh@kernel.org; s.hauer@pengutronix.de;
> shawnguo@kernel.org
> Subject: [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
>
> Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000:
> clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi
> b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 51625bc9154ec..5800a381036bc 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
> clock-output-names = "sai5_mclk";
> };
>
> + clk_sys100m: clock-sys100m {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1000000>;
s/1000000/100000000
Best Regards
Richard Zhu
> + clock-output-names = "clk_sys100m";
> + };
> +
> osc_24m: clock-24m {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> @@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
> };
> };
>
> + hsio_blk_ctl: syscon@4c0100c0 {
> + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> + reg = <0x0 0x4c0100c0 0x0 0x1>;
> + #clock-cells = <1>;
> + clocks = <&clk_sys100m>;
> + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> + };
> +
> usb3_phy: phy@4c1f0040 {
> compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
> reg = <0x0 0x4c1f0040 0x0 0x40>,
> @@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; @@ -1706,8
> +1722,9 @@ pcie1: pcie@4c380000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> --
> 2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes
2025-02-24 17:07 [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
2025-02-25 0:49 ` Hongxing Zhu
@ 2025-02-25 20:12 ` Rob Herring (Arm)
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring (Arm) @ 2025-02-25 20:12 UTC (permalink / raw)
To: Frank Li
Cc: s.hauer, festevam, shawnguo2, shawnguo, linux-kernel, kernel,
linux-arm-kernel, hongxing.zhu, conor+dt, krzk+dt, imx,
devicetree
On Mon, 24 Feb 2025 12:07:51 -0500, Frank Li wrote:
> Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/freescale/' for 20250224170751.146840-1-Frank.Li@nxp.com:
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-02-24 17:07 [PATCH 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
2025-02-25 0:49 ` Hongxing Zhu
2025-02-25 20:12 ` Rob Herring (Arm)
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