[PATCH 0/2] Add SPI support for Radxa ROCK 4D

[PATCH 0/2] Add SPI support for Radxa ROCK 4D

[Detlev Casanova]

The board comes with a SPI NOR chip connected on the FSPI0 interface.

Add the SFC nodes for the rk3576 SoC and enable sfc0 for the Radxa ROCK
4D.

Detlev Casanova (2):
  arm64: dts: rockchip: Add SFC nodes for rk3576
  arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D

 .../boot/dts/rockchip/rk3576-rock-4d.dts      | 16 ++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3576.dtsi      | 22 +++++++++++++++++++
 2 files changed, 38 insertions(+)

-- 
2.48.1

[PATCH 1/2] arm64: dts: rockchip: Add SFC nodes for rk3576

[Detlev Casanova]

The rk3576 SoC has 2 SFC cores that provide FSPI functions.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 4dde954043ef6..a9849003c8dd6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1221,6 +1221,17 @@ gmac1_mtl_tx_setup: tx-queues-config {
 			};
 		};
 
+		sfc1: spi@2a300000 {
+			compatible = "rockchip,sfc";
+			reg = <0x0 0x2a300000 0x0 0x4000>;
+			interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_FSPI1_X2>, <&cru HCLK_FSPI1>;
+			clock-names = "clk_sfc", "hclk_sfc";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sdmmc: mmc@2a310000 {
 			compatible = "rockchip,rk3576-dw-mshc";
 			reg = <0x0 0x2a310000 0x0 0x4000>;
@@ -1260,6 +1271,17 @@ sdhci: mmc@2a330000 {
 			status = "disabled";
 		};
 
+		sfc0: spi@2a340000 {
+			compatible = "rockchip,sfc";
+			reg = <0x0 0x2a340000 0x0 0x4000>;
+			interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_FSPI_X2>, <&cru HCLK_FSPI>;
+			clock-names = "clk_sfc", "hclk_sfc";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@2a701000 {
 			compatible = "arm,gic-400";
 			reg = <0x0 0x2a701000 0 0x10000>,
-- 
2.48.1

[PATCH 2/2] arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D

[Detlev Casanova]

The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node
and add the flash device to it.

The SPI NOR won't work at higher speed than 50 MHz, specify the limit.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
index 5dc1c18a3b211..09977dc191fe1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
@@ -670,6 +670,22 @@ &sdmmc {
 	status = "okay";
 };
 
+
+&sfc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&fspi0_pins &fspi0_csn0>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <1>;
+		vcc-supply = <&vcc_1v8_s3>;
+	};
+};
+
 &u2phy0 {
 	status = "okay";
 };
-- 
2.48.1

Re: [PATCH 0/2] Add SPI support for Radxa ROCK 4D

[Heiko Stuebner]

On Fri, 28 Feb 2025 09:50:46 -0500, Detlev Casanova wrote:
> The board comes with a SPI NOR chip connected on the FSPI0 interface.
> 
> Add the SFC nodes for the rk3576 SoC and enable sfc0 for the Radxa ROCK
> 4D.
> 
> Detlev Casanova (2):
>   arm64: dts: rockchip: Add SFC nodes for rk3576
>   arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: rockchip: Add SFC nodes for rk3576
      commit: 36299757129c897ef8c7ace6981070d367d89f89
[2/2] arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
      commit: ba82f56bbf20e4166c988621cd0507509872848e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>