From: Yujun Dong <yujundong@pascal-lab.net>
To: mingo@kernel.org
Cc: linux-kernel@vger.kernel.org, peterz@infradead.org,
vincent.guittot@linaro.org, vschneid@redhat.com,
yujundong@pascal-lab.net
Subject: Re: [PATCH] cpuidle, sched: Use smp_mb__after_atomic() in current_clr_polling()
Date: Fri, 7 Mar 2025 00:42:17 +0800 [thread overview]
Message-ID: <20250306164217.3028977-1-yujundong@pascal-lab.net> (raw)
In-Reply-To: <Z740eIZcK31DQETq@gmail.com>
Hi Ingo,
* Ingo Molnar <mingo@kernel.org> wrote:
>
> [ Sorry about the belated reply, found this in my TODO pile ... ]
>
> * Yujun Dong <yujundong@pascal-lab.net> wrote:
>
>> In architectures that use the polling bit, current_clr_polling() employs
>> smp_mb() to ensure that the clearing of the polling bit is visible to
>> other cores before checking TIF_NEED_RESCHED.
>>
>> However, smp_mb() can be costly. Given that clear_bit() is an atomic
>> operation, replacing smp_mb() with smp_mb__after_atomic() is appropriate.
>>
>> Many architectures implement smp_mb__after_atomic() as a lighter-weight
>> barrier compared to smp_mb(), leading to performance improvements.
>> For instance, on x86, smp_mb__after_atomic() is a no-op. This change
>> eliminates a smp_mb() instruction in the cpuidle wake-up path, saving
>> several CPU cycles and thereby reducing wake-up latency.
>>
>> Architectures that do not use the polling bit will retain the original
>> smp_mb() behavior to ensure that existing dependencies remain unaffected.
>>
>> Signed-off-by: Yujun Dong <yujundong@pascal-lab.net>
>> ---
>> include/linux/sched/idle.h | 23 ++++++++++++++++-------
>> 1 file changed, 16 insertions(+), 7 deletions(-)
>>
>> diff --git a/include/linux/sched/idle.h b/include/linux/sched/idle.h
>> index e670ac282333..439f6029d3b9 100644
>> --- a/include/linux/sched/idle.h
>> +++ b/include/linux/sched/idle.h
>> @@ -79,6 +79,21 @@ static __always_inline bool __must_check current_clr_polling_and_test(void)
>> return unlikely(tif_need_resched());
>> }
>>
>> +static __always_inline void current_clr_polling(void)
>> +{
>> + __current_clr_polling();
>> +
>> + /*
>> + * Ensure we check TIF_NEED_RESCHED after we clear the polling bit.
>> + * Once the bit is cleared, we'll get IPIs with every new
>> + * TIF_NEED_RESCHED and the IPI handler, scheduler_ipi(), will also
>> + * fold.
>> + */
>> + smp_mb__after_atomic(); /* paired with resched_curr() */
>> +
>> + preempt_fold_need_resched();
>> +}
>> +
>> #else
>> static inline void __current_set_polling(void) { }
>> static inline void __current_clr_polling(void) { }
>> @@ -91,21 +106,15 @@ static inline bool __must_check current_clr_polling_and_test(void)
>> {
>> return unlikely(tif_need_resched());
>> }
>> -#endif
>>
>> static __always_inline void current_clr_polling(void)
>> {
>> __current_clr_polling();
>>
>> - /*
>> - * Ensure we check TIF_NEED_RESCHED after we clear the polling bit.
>> - * Once the bit is cleared, we'll get IPIs with every new
>> - * TIF_NEED_RESCHED and the IPI handler, scheduler_ipi(), will also
>> - * fold.
>> - */
>> smp_mb(); /* paired with resched_curr() */
>
> So this part is weird: you remove the comment that justifies the
> smp_mb(), but you leave the smp_mb() in place. Why?
>
> Thanks,
>
> Ingo
Thanks for pointing that out. The comment removal in the non-polling
branch was intentional, but my original explanation was unclear. Let
me rephrase:
Polling architectures (with the TIF_POLLING flag):
1. __current_clr_polling() performs atomic ops ->
Use smp_mb__after_atomic()
2. Keep original "clear polling bit" comment as it directly explains
the barrier's purpose.
Non-polling architectures (#else branch):
1. __current_clr_polling() is a no-op -> Original comment about
"clearing the bit" becomes misleading.
2. However, the smp_mb() must remain to preserve pre-existing memory
ordering guarantees. And explicitly documenting it requires new
wording to avoid confusion.
Proposed approaches:
Option A: Add a comment for non-polling smp_mb() like "Paired with
resched_curr(), as per pre-existing memory ordering guarantees"
Option B: Leave code as-is (no comment) and elaborate in the commit
message: "For non-polling architectures, retain smp_mb() to avoid
subtle regressions, while intentionally omitting the bit-specific
comment that no longer applies."
Which direction would you consider most maintainable? Your insight
would be greatly appreciated.
Best regards,
Yujun
WARNING: multiple messages have this Message-ID
From: Yujun Dong <yujundong@pascal-lab.net>
To: mingo@kernel.org
Cc: linux-kernel@vger.kernel.org, peterz@infradead.org,
vincent.guittot@linaro.org, vschneid@redhat.com,
yujundong@pascal-lab.net
Subject: Re: [PATCH] cpuidle, sched: Use smp_mb__after_atomic() in current_clr_polling()
Date: Fri, 7 Mar 2025 09:53:44 +0800 [thread overview]
Message-ID: <20250306164217.3028977-1-yujundong@pascal-lab.net> (raw)
Message-ID: <20250307015344.rYWnc_IjWWdrCBBOBB0VRfUq59ED9qPdMaPauWzibxQ@z> (raw)
In-Reply-To: <Z740eIZcK31DQETq@gmail.com>
Hi Ingo,
* Ingo Molnar <mingo@kernel.org> wrote:
>
> [ Sorry about the belated reply, found this in my TODO pile ... ]
>
> * Yujun Dong <yujundong@pascal-lab.net> wrote:
>
>> In architectures that use the polling bit, current_clr_polling() employs
>> smp_mb() to ensure that the clearing of the polling bit is visible to
>> other cores before checking TIF_NEED_RESCHED.
>>
>> However, smp_mb() can be costly. Given that clear_bit() is an atomic
>> operation, replacing smp_mb() with smp_mb__after_atomic() is appropriate.
>>
>> Many architectures implement smp_mb__after_atomic() as a lighter-weight
>> barrier compared to smp_mb(), leading to performance improvements.
>> For instance, on x86, smp_mb__after_atomic() is a no-op. This change
>> eliminates a smp_mb() instruction in the cpuidle wake-up path, saving
>> several CPU cycles and thereby reducing wake-up latency.
>>
>> Architectures that do not use the polling bit will retain the original
>> smp_mb() behavior to ensure that existing dependencies remain unaffected.
>>
>> Signed-off-by: Yujun Dong <yujundong@pascal-lab.net>
>> ---
>> include/linux/sched/idle.h | 23 ++++++++++++++++-------
>> 1 file changed, 16 insertions(+), 7 deletions(-)
>>
>> diff --git a/include/linux/sched/idle.h b/include/linux/sched/idle.h
>> index e670ac282333..439f6029d3b9 100644
>> --- a/include/linux/sched/idle.h
>> +++ b/include/linux/sched/idle.h
>> @@ -79,6 +79,21 @@ static __always_inline bool __must_check current_clr_polling_and_test(void)
>> return unlikely(tif_need_resched());
>> }
>>
>> +static __always_inline void current_clr_polling(void)
>> +{
>> + __current_clr_polling();
>> +
>> + /*
>> + * Ensure we check TIF_NEED_RESCHED after we clear the polling bit.
>> + * Once the bit is cleared, we'll get IPIs with every new
>> + * TIF_NEED_RESCHED and the IPI handler, scheduler_ipi(), will also
>> + * fold.
>> + */
>> + smp_mb__after_atomic(); /* paired with resched_curr() */
>> +
>> + preempt_fold_need_resched();
>> +}
>> +
>> #else
>> static inline void __current_set_polling(void) { }
>> static inline void __current_clr_polling(void) { }
>> @@ -91,21 +106,15 @@ static inline bool __must_check current_clr_polling_and_test(void)
>> {
>> return unlikely(tif_need_resched());
>> }
>> -#endif
>>
>> static __always_inline void current_clr_polling(void)
>> {
>> __current_clr_polling();
>>
>> - /*
>> - * Ensure we check TIF_NEED_RESCHED after we clear the polling bit.
>> - * Once the bit is cleared, we'll get IPIs with every new
>> - * TIF_NEED_RESCHED and the IPI handler, scheduler_ipi(), will also
>> - * fold.
>> - */
>> smp_mb(); /* paired with resched_curr() */
>
> So this part is weird: you remove the comment that justifies the
> smp_mb(), but you leave the smp_mb() in place. Why?
>
> Thanks,
>
> Ingo
Thanks for pointing that out. The comment removal in the non-polling
branch was intentional, but my original explanation was unclear. Let
me rephrase:
Polling architectures (with the TIF_POLLING flag):
1. __current_clr_polling() performs atomic ops ->
Use smp_mb__after_atomic()
2. Keep original "clear polling bit" comment as it directly explains
the barrier's purpose.
Non-polling architectures (#else branch):
1. __current_clr_polling() is a no-op -> Original comment about
"clearing the bit" becomes misleading.
2. However, the smp_mb() must remain to preserve pre-existing memory
ordering guarantees. And explicitly documenting it requires new
wording to avoid confusion.
Proposed approaches:
Option A: Add a comment for non-polling smp_mb() like "Paired with
resched_curr(), as per pre-existing memory ordering guarantees"
Option B: Leave code as-is (no comment) and elaborate in the commit
message: "For non-polling architectures, retain smp_mb() to avoid
subtle regressions, while intentionally omitting the bit-specific
comment that no longer applies."
Which direction would you consider most maintainable? Your insight
would be greatly appreciated.
Best regards,
Yujun
next prev parent reply other threads:[~2025-03-06 17:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-30 14:16 Yujun Dong
2025-02-25 21:22 ` Ingo Molnar
2025-03-06 16:42 ` Yujun Dong [this message]
2025-03-07 1:53 ` Yujun Dong
2025-03-20 9:10 ` Ingo Molnar
2025-03-20 9:11 ` [tip: sched/core] " tip-bot2 for Yujun Dong
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250306164217.3028977-1-yujundong@pascal-lab.net \
--to=yujundong@pascal-lab.net \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
--cc=vincent.guittot@linaro.org \
--cc=vschneid@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®