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From: Xu Lu <luxu.kernel@bytedance.com>
To: akpm@linux-foundation.org, tjeznach@rivosinc.com,
	joro@8bytes.org, will@kernel.org, robin.murphy@arm.com
Cc: lihangjing@bytedance.com, xieyongji@bytedance.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Xu Lu <luxu.kernel@bytedance.com>
Subject: [PATCH v1 0/4] riscv: iommu: Support Svnapot
Date: Mon, 10 Mar 2025 21:22:18 +0800	[thread overview]
Message-ID: <20250310132222.58378-1-luxu.kernel@bytedance.com> (raw)

According to the RISC-V IOMMU hardware spec, the IOMMU implementation
has the same translation process as MMU and supports Svnapot standard
extension as well. These patches add support for Svnapot in the IOMMU
driver to make 64K also an available page size during DMA mapping.

Xu Lu (4):
  mm/gup: Handle huge pte for follow_page_pte()
  iommu/riscv: Use pte_t to represent page table entry
  iommu/riscv: Introduce IOMMU page table lock
  iommu/riscv: Add support for Svnapot

 arch/riscv/include/asm/pgtable.h |   6 +
 drivers/iommu/riscv/iommu.c      | 253 +++++++++++++++++++++++++------
 include/linux/pgtable.h          |   8 +
 mm/gup.c                         |  22 ++-
 4 files changed, 235 insertions(+), 54 deletions(-)

-- 
2.20.1


             reply	other threads:[~2025-03-10 13:22 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-10 13:22 Xu Lu [this message]
2025-03-10 13:22 ` [PATCH 1/4] mm/gup: Handle huge pte for follow_page_pte() Xu Lu
2025-03-10 13:22 ` [PATCH 2/4] iommu/riscv: Use pte_t to represent page table entry Xu Lu
2025-03-10 13:22 ` [PATCH 3/4] iommu/riscv: Introduce IOMMU page table lock Xu Lu
2025-03-10 13:22 ` [PATCH 4/4] iommu/riscv: Add support for Svnapot Xu Lu

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