[PATCH v4 0/2] x86: Prepare for new Intel Family numbers

[Sohil Mehta <sohil.mehta@intel.com>]

---Summary---
Mainstream Intel processors have been using Family 6 for a couple of decades.
This series is an audit of all the arch/x86 Intel Family-model checks to get
ready for the upcoming Family 18 and 19 models. It also converts one of the
last remaining Intel-specific x86_model checks to VFM ones.

Most of the patches were picked up from the v3 series and applied to tip.
This series contains the remaining perf/x86 patches rebased on tip:x86/cpu.

---v4 changes---
* Addressed comments from Kan Liang.
* Picked up Kan Liang's review tags.
* Rebased on top of tip:x86/cpu.

---Previous versions---
Refer to the v2 cover letter for more background.

v3: https://lore.kernel.org/lkml/20250219184133.816753-1-sohil.mehta@intel.com/
v2: https://lore.kernel.org/lkml/20250211194407.2577252-1-sohil.mehta@intel.com/
RFC-v1: https://lore.kernel.org/lkml/20241220213711.1892696-1-sohil.mehta@intel.com/

Sohil Mehta (2):
  perf/x86: Simplify Intel PMU initialization
  perf/x86/p4: Replace Pentium 4 model checks with VFM ones

 arch/x86/events/intel/core.c        | 14 ++++++++++----
 arch/x86/events/intel/p4.c          |  7 ++++---
 arch/x86/events/intel/p6.c          | 26 +++-----------------------
 arch/x86/include/asm/intel-family.h |  1 +
 4 files changed, 18 insertions(+), 30 deletions(-)


base-commit: 08d9bb5b0d89826fedc5204c8bd2463220465996
-- 
2.43.0