[PATCH 3/3] ASoC: dwc: always enable/disable i2s irqs

[PATCH 3/3] ASoC: dwc: always enable/disable i2s irqs

[Brady Norander]

Commit a42e988 ("ASoC: dwc: add DMA handshake control") changed the
behavior of the driver to not enable or disable i2s irqs if using DMA. This
breaks platforms such as AMD ACP. Revert to the old behavior by always
enabling and disabling i2s irqs while keeping DMA handshake control.

Fixes: a42e988 ("ASoC: dwc: add DMA handshake control")
Signed-off-by: Brady Norander <bradynorander@gmail.com>
---
 sound/soc/dwc/dwc-i2s.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/sound/soc/dwc/dwc-i2s.c b/sound/soc/dwc/dwc-i2s.c
index 57b789d7fbed..5b4f20dbf7bb 100644
--- a/sound/soc/dwc/dwc-i2s.c
+++ b/sound/soc/dwc/dwc-i2s.c
@@ -199,12 +199,10 @@ static void i2s_start(struct dw_i2s_dev *dev,
 	else
 		i2s_write_reg(dev->i2s_base, IRER, 1);
 
-	/* I2S needs to enable IRQ to make a handshake with DMAC on the JH7110 SoC */
-	if (dev->use_pio || dev->is_jh7110)
-		i2s_enable_irqs(dev, substream->stream, config->chan_nr);
-	else
+	if (!(dev->use_pio || dev->is_jh7110))
 		i2s_enable_dma(dev, substream->stream);
 
+	i2s_enable_irqs(dev, substream->stream, config->chan_nr);
 	i2s_write_reg(dev->i2s_base, CER, 1);
 }
 
@@ -218,11 +216,12 @@ static void i2s_stop(struct dw_i2s_dev *dev,
 	else
 		i2s_write_reg(dev->i2s_base, IRER, 0);
 
-	if (dev->use_pio || dev->is_jh7110)
-		i2s_disable_irqs(dev, substream->stream, 8);
-	else
+	if (!(dev->use_pio || dev->is_jh7110))
 		i2s_disable_dma(dev, substream->stream);
 
+	i2s_disable_irqs(dev, substream->stream, 8);
+
+
 	if (!dev->active) {
 		i2s_write_reg(dev->i2s_base, CER, 0);
 		i2s_write_reg(dev->i2s_base, IER, 0);
-- 
2.49.0

Re: [PATCH 3/3] ASoC: dwc: always enable/disable i2s irqs

[Mark Brown]

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On Tue, Mar 25, 2025 at 05:18:05PM -0400, Brady Norander wrote:

> Commit a42e988 ("ASoC: dwc: add DMA handshake control") changed the
> behavior of the driver to not enable or disable i2s irqs if using DMA. This
> breaks platforms such as AMD ACP. Revert to the old behavior by always
> enabling and disabling i2s irqs while keeping DMA handshake control.
> 
> Fixes: a42e988 ("ASoC: dwc: add DMA handshake control")
> Signed-off-by: Brady Norander <bradynorander@gmail.com>

Same issue with dependencies here - what's going on?  It also doesn't
seem like the changelog is describing what's goin on well, if all AMD
systems were broken by a change from 2023 I'd really expect to have
heard about it by now.  We've had AMD themselves doing fairly extensive
work without reporting any issues.  What specifically is the problem you
are seeing?

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