* [PATCH v3] iio: dac: ad3552r-hs: add debugfs reg access
@ 2025-03-19 15:45 Angelo Dureghello
2025-03-19 15:54 ` David Lechner
0 siblings, 1 reply; 3+ messages in thread
From: Angelo Dureghello @ 2025-03-19 15:45 UTC (permalink / raw)
To: Lars-Peter Clausen, Michael Hennerich, Jonathan Cameron
Cc: linux-iio, linux-kernel, Angelo Dureghello, Nuno Sá
From: Angelo Dureghello <adureghello@baylibre.com>
Add debugfs register access.
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
---
Changes in v3:
- remove unneeded debugfs include,
- move max_reg_addr in model info structure,
- set read size to 8 bit, always.
- Link to v2: https://lore.kernel.org/r/20250319-wip-bl-ad3552r-fixes-v2-1-2656bdd6778e@baylibre.com
Changes in v2:
- set reg size setup as inline.
- Link to v1: https://lore.kernel.org/r/20250319-wip-bl-ad3552r-fixes-v1-1-cf10d6fae52a@baylibre.com
---
drivers/iio/dac/ad3552r-common.c | 4 ++++
drivers/iio/dac/ad3552r-hs.c | 20 ++++++++++++++++++++
drivers/iio/dac/ad3552r.h | 1 +
3 files changed, 25 insertions(+)
diff --git a/drivers/iio/dac/ad3552r-common.c b/drivers/iio/dac/ad3552r-common.c
index b8807e54fa057fe02afd9734ad67a4eb0a498e3a..38baaea0e6c85cba7ac6f334a3c31c7be88ac780 100644
--- a/drivers/iio/dac/ad3552r-common.c
+++ b/drivers/iio/dac/ad3552r-common.c
@@ -43,6 +43,7 @@ const struct ad3552r_model_data ad3541r_model_data = {
.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
.requires_output_range = true,
.num_spi_data_lanes = 2,
+ .max_reg_addr = 0x46,
};
EXPORT_SYMBOL_NS_GPL(ad3541r_model_data, "IIO_AD3552R");
@@ -54,6 +55,7 @@ const struct ad3552r_model_data ad3542r_model_data = {
.num_ranges = ARRAY_SIZE(ad3542r_ch_ranges),
.requires_output_range = true,
.num_spi_data_lanes = 2,
+ .max_reg_addr = 0x49,
};
EXPORT_SYMBOL_NS_GPL(ad3542r_model_data, "IIO_AD3552R");
@@ -65,6 +67,7 @@ const struct ad3552r_model_data ad3551r_model_data = {
.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
.requires_output_range = false,
.num_spi_data_lanes = 4,
+ .max_reg_addr = 0x46,
};
EXPORT_SYMBOL_NS_GPL(ad3551r_model_data, "IIO_AD3552R");
@@ -76,6 +79,7 @@ const struct ad3552r_model_data ad3552r_model_data = {
.num_ranges = ARRAY_SIZE(ad3552r_ch_ranges),
.requires_output_range = false,
.num_spi_data_lanes = 4,
+ .max_reg_addr = 0x49,
};
EXPORT_SYMBOL_NS_GPL(ad3552r_model_data, "IIO_AD3552R");
diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c
index cd8dabb60c5548780f0fce5d1b68c494cd71321d..37397e188f225a8099745ec03f7c604da76960b1 100644
--- a/drivers/iio/dac/ad3552r-hs.c
+++ b/drivers/iio/dac/ad3552r-hs.c
@@ -464,6 +464,25 @@ static int ad3552r_hs_setup_custom_gain(struct ad3552r_hs_state *st,
gain, 1);
}
+static int ad3552r_hs_reg_access(struct iio_dev *indio_dev, unsigned int reg,
+ unsigned int writeval, unsigned int *readval)
+{
+ struct ad3552r_hs_state *st = iio_priv(indio_dev);
+
+ if (reg > st->model_data->max_reg_addr)
+ return -EINVAL;
+
+ /*
+ * There are 8, 16 or 24 bit registers, but HDL supports only reading 8
+ * or 16 bit data, not 24. So, also to avoid to check any proper read
+ * alignment, supporting only 8-bit readings here.
+ */
+ if (readval)
+ return ad3552r_hs_reg_read(st, reg, readval, 1);
+
+ return st->data->bus_reg_write(st->back, reg, writeval, 1);
+}
+
static int ad3552r_hs_setup(struct ad3552r_hs_state *st)
{
u16 id;
@@ -639,6 +658,7 @@ static const struct iio_chan_spec ad3552r_hs_channels[] = {
static const struct iio_info ad3552r_hs_info = {
.read_raw = &ad3552r_hs_read_raw,
.write_raw = &ad3552r_hs_write_raw,
+ .debugfs_reg_access = &ad3552r_hs_reg_access,
};
static int ad3552r_hs_probe(struct platform_device *pdev)
diff --git a/drivers/iio/dac/ad3552r.h b/drivers/iio/dac/ad3552r.h
index 768fa264d39e9e6d517aeb4098382e072f153543..9bb46a9e07a586d407a400094f1872ea79836dc3 100644
--- a/drivers/iio/dac/ad3552r.h
+++ b/drivers/iio/dac/ad3552r.h
@@ -156,6 +156,7 @@ struct ad3552r_model_data {
int num_ranges;
bool requires_output_range;
int num_spi_data_lanes;
+ int max_reg_addr;
};
struct ad3552r_ch_data {
---
base-commit: 6f9141cdd726e82d209b5fc6d6b5ea32ace339f1
change-id: 20250319-wip-bl-ad3552r-fixes-4fbbe9dd1d2b
Best regards,
--
Angelo Dureghello <adureghello@baylibre.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v3] iio: dac: ad3552r-hs: add debugfs reg access
2025-03-19 15:45 [PATCH v3] iio: dac: ad3552r-hs: add debugfs reg access Angelo Dureghello
@ 2025-03-19 15:54 ` David Lechner
2025-03-30 16:47 ` Jonathan Cameron
0 siblings, 1 reply; 3+ messages in thread
From: David Lechner @ 2025-03-19 15:54 UTC (permalink / raw)
To: Angelo Dureghello, Lars-Peter Clausen, Michael Hennerich,
Jonathan Cameron
Cc: linux-iio, linux-kernel, Nuno Sá
On 3/19/25 10:45 AM, Angelo Dureghello wrote:
> From: Angelo Dureghello <adureghello@baylibre.com>
>
> Add debugfs register access.
>
> Reviewed-by: Nuno Sá <nuno.sa@analog.com>
> Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> ---
Reviewed-by: David Lechner <dlechner@baylibre.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v3] iio: dac: ad3552r-hs: add debugfs reg access
2025-03-19 15:54 ` David Lechner
@ 2025-03-30 16:47 ` Jonathan Cameron
0 siblings, 0 replies; 3+ messages in thread
From: Jonathan Cameron @ 2025-03-30 16:47 UTC (permalink / raw)
To: David Lechner
Cc: Angelo Dureghello, Lars-Peter Clausen, Michael Hennerich,
linux-iio, linux-kernel, Nuno Sá
On Wed, 19 Mar 2025 10:54:10 -0500
David Lechner <dlechner@baylibre.com> wrote:
> On 3/19/25 10:45 AM, Angelo Dureghello wrote:
> > From: Angelo Dureghello <adureghello@baylibre.com>
> >
> > Add debugfs register access.
> >
> > Reviewed-by: Nuno Sá <nuno.sa@analog.com>
> > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
> > ---
> Reviewed-by: David Lechner <dlechner@baylibre.com>
>
Applied.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-03-19 15:45 [PATCH v3] iio: dac: ad3552r-hs: add debugfs reg access Angelo Dureghello
2025-03-19 15:54 ` David Lechner
2025-03-30 16:47 ` Jonathan Cameron
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