From: yiru zhang <yiru.zhang@mediatek.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: <coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
yiru zhang <yiru.zhang@mediatek.com>
Subject: [PATCH] [Patch v1]Add ETE devarch condition in etm4_init_iomem_access
Date: Tue, 8 Apr 2025 15:36:46 +0800 [thread overview]
Message-ID: <20250408073651.17140-1-yiru.zhang@mediatek.com> (raw)
Due to ETE supported, so add ETE devarch condition in etm4_init_iomem_access.
Signed-off-by: yiru zhang <yiru.zhang@mediatek.com>
---
drivers/hwtracing/coresight/coresight-etm4x-core.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 2b8f10463840..971b9f0fe5e4 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -1135,8 +1135,9 @@ static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
* with MMIO. But we cannot touch the OSLK until we are
* sure this is an ETM. So rely only on the TRCDEVARCH.
*/
- if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
- pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
+ if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH \
+ && (devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETE_ARCH) {
+ pr_warn_once("TRCDEVARCH doesn't match ETMv4&ETE architecture\n");
return false;
}
--
2.46.0
next reply other threads:[~2025-04-08 7:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-08 7:36 yiru zhang [this message]
2025-04-08 9:05 ` Suzuki K Poulose
2025-04-09 3:10 ` Yiru Zhang (张熠儒)
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