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From: kernel test robot <lkp@intel.com>
To: hans.zhang@cixtech.com, bhelgaas@google.com,
	lpieralisi@kernel.org, kw@linux.com,
	manivannan.sadhasivam@linaro.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Manikandan K Pillai <mpillai@cadence.com>,
	Hans Zhang <hans.zhang@cixtech.com>
Subject: Re: [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller
Date: Mon, 14 Apr 2025 15:47:00 +0800	[thread overview]
Message-ID: <202504141523.v9N9MrDJ-lkp@intel.com> (raw)
In-Reply-To: <20250411103656.2740517-6-hans.zhang@cixtech.com>

Hi,

kernel test robot noticed the following build errors:

[auto build test ERROR on a24588245776dafc227243a01bfbeb8a59bafba9]

url:    https://github.com/intel-lab-lkp/linux/commits/hans-zhang-cixtech-com/dt-bindings-pci-cadence-Extend-compatible-for-new-RP-configuration/20250414-094836
base:   a24588245776dafc227243a01bfbeb8a59bafba9
patch link:    https://lore.kernel.org/r/20250411103656.2740517-6-hans.zhang%40cixtech.com
patch subject: [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller
config: x86_64-buildonly-randconfig-002-20250414 (https://download.01.org/0day-ci/archive/20250414/202504141523.v9N9MrDJ-lkp@intel.com/config)
compiler: clang version 20.1.2 (https://github.com/llvm/llvm-project 58df0ef89dd64126512e4ee27b4ac3fd8ddf6247)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250414/202504141523.v9N9MrDJ-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504141523.v9N9MrDJ-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/pci/controller/cadence/pcie-cadence-host.c:108:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     108 |         addr0 = CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS(12) |
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:309:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS'
     309 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS_MASK, \
         |         ^
   drivers/pci/controller/cadence/pcie-cadence-host.c:574:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     574 |         value = CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR0_CTRL(ctrl) |
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:263:2: note: expanded from macro 'CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR0_CTRL'
     263 |         FIELD_PREP(CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR0_CTRL_MASK, c)
         |         ^
   drivers/pci/controller/cadence/pcie-cadence-host.c:610:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     610 |         addr0 = CDNS_PCIE_HPA_AT_IB_RP_BAR_ADDR0_NBITS(aperture) |
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:361:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_IB_RP_BAR_ADDR0_NBITS'
     361 |         FIELD_PREP(CDNS_PCIE_HPA_AT_IB_RP_BAR_ADDR0_NBITS_MASK, ((nbits) - 1))
         |         ^
   drivers/pci/controller/cadence/pcie-cadence-host.c:663:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     663 |         desc1 = CDNS_PCIE_HPA_AT_OB_REGION_DESC1_BUS(busnr);
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:339:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_DESC1_BUS'
     339 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC1_BUS_MASK, bus)
         |         ^
   4 errors generated.
--
>> drivers/pci/controller/cadence/pcie-cadence.c:199:8: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     199 |                             CDNS_PCIE_HPA_DETECT_QUIET_MIN_DELAY(delay));
         |                             ^
   drivers/pci/controller/cadence/pcie-cadence.h:375:2: note: expanded from macro 'CDNS_PCIE_HPA_DETECT_QUIET_MIN_DELAY'
     375 |         FIELD_PREP(CDNS_PCIE_HPA_DETECT_QUIET_MIN_DELAY_MASK, delay)
         |         ^
   drivers/pci/controller/cadence/pcie-cadence.c:221:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     221 |         addr0 = CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS(nbits) |
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:309:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS'
     309 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS_MASK, \
         |         ^
   drivers/pci/controller/cadence/pcie-cadence.c:293:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     293 |         desc0 = CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_NORMAL_MSG;
         |                 ^
   drivers/pci/controller/cadence/pcie-cadence.h:333:2: note: expanded from macro 'CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_NORMAL_MSG'
     333 |         FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x10)
         |         ^
   3 errors generated.


vim +/FIELD_PREP +108 drivers/pci/controller/cadence/pcie-cadence-host.c

    72	
    73	void __iomem *cdns_pci_hpa_map_bus(struct pci_bus *bus, unsigned int devfn,
    74					   int where)
    75	{
    76		struct pci_host_bridge *bridge = pci_find_host_bridge(bus);
    77		struct cdns_pcie_rc *rc = pci_host_bridge_priv(bridge);
    78		struct cdns_pcie *pcie = &rc->pcie;
    79		unsigned int busn = bus->number;
    80		u32 addr0, desc0, desc1, ctrl0;
    81		u32 regval;
    82	
    83		if (pci_is_root_bus(bus)) {
    84			/*
    85			 * Only the root port (devfn == 0) is connected to this bus.
    86			 * All other PCI devices are behind some bridge hence on another
    87			 * bus.
    88			 */
    89			if (devfn)
    90				return NULL;
    91	
    92			return pcie->reg_base + (where & 0xfff);
    93		}
    94	
    95		/*
    96		 * Clear AXI link-down status
    97		 */
    98		regval = cdns_pcie_hpa_readl(pcie, REG_BANK_AXI_SLAVE, CDNS_PCIE_HPA_AT_LINKDOWN);
    99		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE, CDNS_PCIE_HPA_AT_LINKDOWN,
   100				     (regval & GENMASK(0, 0)));
   101	
   102		desc1 = 0;
   103		ctrl0 = 0;
   104	
   105		/*
   106		 * Update Output registers for AXI region 0.
   107		 */
 > 108		addr0 = CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_NBITS(12) |
   109			CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_DEVFN(devfn) |
   110			CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_BUS(busn);
   111		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   112				     CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0(0), addr0);
   113	
   114		desc1 = cdns_pcie_hpa_readl(pcie, REG_BANK_AXI_SLAVE,
   115					    CDNS_PCIE_HPA_AT_OB_REGION_DESC1(0));
   116		desc1 &= ~CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN_MASK;
   117		desc1 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN(0);
   118		ctrl0 = CDNS_PCIE_HPA_AT_OB_REGION_CTRL0_SUPPLY_BUS |
   119			CDNS_PCIE_HPA_AT_OB_REGION_CTRL0_SUPPLY_DEV_FN;
   120	
   121		if (busn == bridge->busnr + 1)
   122			desc0 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_CONF_TYPE0;
   123		else
   124			desc0 |= CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_CONF_TYPE1;
   125	
   126		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   127				     CDNS_PCIE_HPA_AT_OB_REGION_DESC0(0), desc0);
   128		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   129				     CDNS_PCIE_HPA_AT_OB_REGION_DESC1(0), desc1);
   130		cdns_pcie_hpa_writel(pcie, REG_BANK_AXI_SLAVE,
   131				     CDNS_PCIE_HPA_AT_OB_REGION_CTRL0(0), ctrl0);
   132	
   133		return rc->cfg_base + (where & 0xfff);
   134	}
   135	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

  parent reply	other threads:[~2025-04-14  7:47 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-11 10:36 [PATCH v3 0/6] Enhance the PCIe controller driver hans.zhang
2025-04-11 10:36 ` [PATCH v3 1/6] dt-bindings: pci: cadence: Extend compatible for new RP configuration hans.zhang
2025-04-11 19:56   ` Rob Herring
2025-04-14  3:05     ` Manikandan Karunakaran Pillai
2025-04-11 10:36 ` [PATCH v3 2/6] dt-bindings: pci: cadence: Extend compatible for new EP configurations hans.zhang
2025-04-11 10:36 ` [PATCH v3 3/6] PCI: cadence: Add header support for PCIe HPA controller hans.zhang
2025-04-11 20:31   ` Rob Herring
2025-04-12 15:19     ` Hans Zhang
2025-04-11 10:36 ` [PATCH v3 4/6] PCI: cadence: Add support for PCIe Endpoint " hans.zhang
2025-04-11 10:36 ` [PATCH v3 5/6] PCI: cadence: Add callback functions for RP and EP controller hans.zhang
2025-04-11 20:24   ` Rob Herring
2025-04-12 15:45     ` Hans Zhang
2025-04-12 16:02       ` Hans Zhang
2025-04-14  3:52     ` Manikandan Karunakaran Pillai
2025-04-24  2:58       ` Rob Herring
2025-04-24  3:53         ` Manikandan Karunakaran Pillai
2025-04-24 15:07           ` Rob Herring
2025-04-14  4:13   ` kernel test robot
2025-04-14  7:47   ` kernel test robot [this message]
2025-04-14  9:20   ` kernel test robot
2025-04-11 10:36 ` [PATCH v3 6/6] PCI: cadence: Update support for TI J721e boards hans.zhang
2025-04-11 20:25   ` Rob Herring
2025-04-14  3:12     ` Manikandan Karunakaran Pillai

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