From: Konrad Dybcio <konradybcio@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Akhil P Oommen <quic_akhilpo@quicinc.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH RFT v2 02/15] drm/msm: Offset MDSS HBB value by 13
Date: Wed, 14 May 2025 17:10:22 +0200 [thread overview]
Message-ID: <20250514-topic-ubwc_central-v2-2-09ecbc0a05ce@oss.qualcomm.com> (raw)
In-Reply-To: <20250514-topic-ubwc_central-v2-0-09ecbc0a05ce@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The Adreno part of the driver exposes this value to userspace, and the
SMEM data source also presents a x+13 value. Keep things coherent and
make the value uniform across them.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
drivers/gpu/drm/msm/msm_mdss.c | 50 +++++++++++++++++++++---------------------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 709979fcfab6062c0f316f7655823e888638bfea..2c9531217eca7ac2308c6d1fa78287363ca652f9 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -167,7 +167,7 @@ static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)
{
const struct msm_mdss_data *data = msm_mdss->mdss_data;
u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) |
- MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit);
+ MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13);
if (data->ubwc_bank_spread)
value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD;
@@ -182,7 +182,7 @@ static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)
{
const struct msm_mdss_data *data = msm_mdss->mdss_data;
u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle & 0x1) |
- MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit);
+ MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13);
if (data->macrotile_mode)
value |= MDSS_UBWC_STATIC_MACROTILE_MODE;
@@ -200,7 +200,7 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)
{
const struct msm_mdss_data *data = msm_mdss->mdss_data;
u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) |
- MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit);
+ MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit - 13);
if (data->ubwc_bank_spread)
value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD;
@@ -259,9 +259,9 @@ static const struct msm_mdss_data *msm_mdss_generate_mdp5_mdss_data(struct msm_m
if (hw_rev == MDSS_HW_MSM8996 ||
hw_rev == MDSS_HW_MSM8998)
- data->highest_bank_bit = 2;
+ data->highest_bank_bit = 15;
else
- data->highest_bank_bit = 1;
+ data->highest_bank_bit = 14;
return data;
}
@@ -572,13 +572,13 @@ static void mdss_remove(struct platform_device *pdev)
static const struct msm_mdss_data msm8998_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_dec_version = UBWC_1_0,
- .highest_bank_bit = 2,
+ .highest_bank_bit = 15,
.reg_bus_bw = 76800,
};
static const struct msm_mdss_data qcm2290_data = {
/* no UBWC */
- .highest_bank_bit = 0x2,
+ .highest_bank_bit = 15,
.reg_bus_bw = 76800,
};
@@ -587,7 +587,7 @@ static const struct msm_mdss_data sa8775p_data = {
.ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = 4,
.ubwc_bank_spread = true,
- .highest_bank_bit = 0,
+ .highest_bank_bit = 13,
.macrotile_mode = true,
.reg_bus_bw = 74000,
};
@@ -597,7 +597,7 @@ static const struct msm_mdss_data sar2130p_data = {
.ubwc_dec_version = UBWC_4_3,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
- .highest_bank_bit = 0,
+ .highest_bank_bit = 13,
.macrotile_mode = 1,
.reg_bus_bw = 74000,
};
@@ -607,7 +607,7 @@ static const struct msm_mdss_data sc7180_data = {
.ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
- .highest_bank_bit = 0x1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
@@ -616,7 +616,7 @@ static const struct msm_mdss_data sc7280_data = {
.ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
.macrotile_mode = true,
.reg_bus_bw = 74000,
};
@@ -624,7 +624,7 @@ static const struct msm_mdss_data sc7280_data = {
static const struct msm_mdss_data sc8180x_data = {
.ubwc_enc_version = UBWC_3_0,
.ubwc_dec_version = UBWC_3_0,
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
.reg_bus_bw = 76800,
};
@@ -634,7 +634,7 @@ static const struct msm_mdss_data sc8280xp_data = {
.ubwc_dec_version = UBWC_4_0,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
.reg_bus_bw = 76800,
};
@@ -642,14 +642,14 @@ static const struct msm_mdss_data sc8280xp_data = {
static const struct msm_mdss_data sdm670_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_dec_version = UBWC_2_0,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
static const struct msm_mdss_data sdm845_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_dec_version = UBWC_2_0,
- .highest_bank_bit = 2,
+ .highest_bank_bit = 15,
.reg_bus_bw = 76800,
};
@@ -658,21 +658,21 @@ static const struct msm_mdss_data sm6350_data = {
.ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
static const struct msm_mdss_data sm7150_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_dec_version = UBWC_2_0,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
static const struct msm_mdss_data sm8150_data = {
.ubwc_enc_version = UBWC_3_0,
.ubwc_dec_version = UBWC_3_0,
- .highest_bank_bit = 2,
+ .highest_bank_bit = 15,
.reg_bus_bw = 76800,
};
@@ -681,7 +681,7 @@ static const struct msm_mdss_data sm6115_data = {
.ubwc_dec_version = UBWC_2_0,
.ubwc_swizzle = 7,
.ubwc_bank_spread = true,
- .highest_bank_bit = 0x1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
@@ -689,13 +689,13 @@ static const struct msm_mdss_data sm6125_data = {
.ubwc_enc_version = UBWC_1_0,
.ubwc_dec_version = UBWC_3_0,
.ubwc_swizzle = 1,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
};
static const struct msm_mdss_data sm6150_data = {
.ubwc_enc_version = UBWC_2_0,
.ubwc_dec_version = UBWC_2_0,
- .highest_bank_bit = 1,
+ .highest_bank_bit = 14,
.reg_bus_bw = 76800,
};
@@ -705,7 +705,7 @@ static const struct msm_mdss_data sm8250_data = {
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 2 for LP_DDR4 */
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
.reg_bus_bw = 76800,
};
@@ -716,7 +716,7 @@ static const struct msm_mdss_data sm8350_data = {
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 2 for LP_DDR4 */
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
.reg_bus_bw = 74000,
};
@@ -727,7 +727,7 @@ static const struct msm_mdss_data sm8550_data = {
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 2 for LP_DDR4 */
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
.reg_bus_bw = 57000,
};
@@ -738,7 +738,7 @@ static const struct msm_mdss_data x1e80100_data = {
.ubwc_swizzle = 6,
.ubwc_bank_spread = true,
/* TODO: highest_bank_bit = 2 for LP_DDR4 */
- .highest_bank_bit = 3,
+ .highest_bank_bit = 16,
.macrotile_mode = true,
/* TODO: Add reg_bus_bw with real value */
};
--
2.49.0
next prev parent reply other threads:[~2025-05-14 15:10 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 15:10 [RFT PATCH v2 00/15] Add a single source of truth for UBWC configuration data Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 01/15] soc: qcom: Add UBWC config provider Konrad Dybcio
2025-05-14 15:29 ` Konrad Dybcio
2025-05-14 19:03 ` Dmitry Baryshkov
2025-05-15 15:50 ` Konrad Dybcio
2025-05-14 15:10 ` Konrad Dybcio [this message]
2025-05-14 19:04 ` [PATCH RFT v2 02/15] drm/msm: Offset MDSS HBB value by 13 Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 03/15] drm/msm: Use the central UBWC config database Konrad Dybcio
2025-05-14 19:05 ` Dmitry Baryshkov
2025-05-15 10:32 ` kernel test robot
2025-05-14 15:10 ` [PATCH RFT v2 04/15] drm/msm/a6xx: Get a handle to the common UBWC config Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 05/15] drm/msm/a6xx: Resolve the meaning of AMSBC Konrad Dybcio
2025-05-14 19:16 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 06/15] drm/msm/a6xx: Simplify uavflagprd_inv detection Konrad Dybcio
2025-05-14 19:14 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 07/15] drm/msm/a6xx: Resolve the meaning of UBWC_MODE Konrad Dybcio
2025-05-14 19:14 ` Dmitry Baryshkov
2025-05-14 20:02 ` Rob Clark
2025-05-14 15:10 ` [PATCH RFT v2 08/15] drm/msm/a6xx: Replace '2' with BIT(1) in level2_swizzling_dis calc Konrad Dybcio
2025-05-14 19:15 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 09/15] drm/msm/a6xx: Resolve the meaning of rgb565_predicator Konrad Dybcio
2025-05-14 19:15 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 10/15] drm/msm/a6xx: Simplify min_acc_len calculation Konrad Dybcio
2025-05-14 19:19 ` Dmitry Baryshkov
2025-05-15 15:51 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 11/15] drm/msm/adreno: Switch to the common UBWC config struct Konrad Dybcio
2025-05-14 19:22 ` Dmitry Baryshkov
2025-05-15 15:51 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 12/15] drm/msm/a6xx: Drop cfg->ubwc_swizzle override Konrad Dybcio
2025-05-14 20:32 ` Dmitry Baryshkov
2025-05-15 15:52 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value Konrad Dybcio
2025-05-14 19:23 ` Dmitry Baryshkov
2025-05-14 20:05 ` Konrad Dybcio
2025-05-14 20:33 ` Dmitry Baryshkov
2025-05-15 16:18 ` Konrad Dybcio
2025-05-15 16:21 ` Dmitry Baryshkov
2025-05-15 16:35 ` Konrad Dybcio
2025-05-15 17:15 ` Dmitry Baryshkov
2025-05-15 17:56 ` Konrad Dybcio
2025-05-15 17:58 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 14/15] soc: qcom: ubwc: Add #defines for UBWC swizzle bits Konrad Dybcio
2025-05-14 19:24 ` Dmitry Baryshkov
2025-05-14 20:09 ` Konrad Dybcio
2025-05-14 20:33 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFC RFT v2 15/15] drm/msm/a6xx: Warn if the highest_bank_bit value is overwritten Konrad Dybcio
2025-05-14 19:25 ` Dmitry Baryshkov
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