From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
To: <linux-kernel@vger.kernel.org>
Cc: <bp@alien8.de>, <tglx@linutronix.de>, <mingo@redhat.com>,
<dave.hansen@linux.intel.com>, <Thomas.Lendacky@amd.com>,
<nikunj@amd.com>, <Santosh.Shukla@amd.com>,
<Vasant.Hegde@amd.com>, <Suravee.Suthikulpanit@amd.com>,
<David.Kaplan@amd.com>, <x86@kernel.org>, <hpa@zytor.com>,
<peterz@infradead.org>, <seanjc@google.com>,
<pbonzini@redhat.com>, <kvm@vger.kernel.org>,
<kirill.shutemov@linux.intel.com>, <huibo.wang@amd.com>,
<naveen.rao@amd.com>, <francescolavra.fl@gmail.com>,
<tiala@microsoft.com>
Subject: [RFC PATCH v6 01/32] x86/apic: KVM: Deduplicate APIC vector => register+bit math
Date: Wed, 14 May 2025 12:47:32 +0530 [thread overview]
Message-ID: <20250514071803.209166-2-Neeraj.Upadhyay@amd.com> (raw)
In-Reply-To: <20250514071803.209166-1-Neeraj.Upadhyay@amd.com>
From: Sean Christopherson <seanjc@google.com>
Consolidate KVM's {REG,VEC}_POS() macros and lapic_vector_set_in_irr()'s
open coded equivalent logic in anticipation of the kernel gaining more
usage of vector => reg+bit lookups.
Use lapic_vector_set_in_irr()'s math as using divides for both the bit
number and register offset makes it easier to connect the dots, and for at
least one user, fixup_irqs(), "/ 32 * 0x10" generates ever so slightly
better code with gcc-14 (shaves a whole 3 bytes from the code stream):
((v) >> 5) << 4:
c1 ef 05 shr $0x5,%edi
c1 e7 04 shl $0x4,%edi
81 c7 00 02 00 00 add $0x200,%edi
(v) / 32 * 0x10:
c1 ef 05 shr $0x5,%edi
83 c7 20 add $0x20,%edi
c1 e7 04 shl $0x4,%edi
Keep KVM's tersely named macros as "wrappers" to avoid unnecessary churn
in KVM, and because the shorter names yield more readable code overall in
KVM.
No functional change intended (clang-19 and gcc-14 generate bit-for-bit
identical code for all of kvm.ko).
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
Changes since v5:
- New change.
arch/x86/include/asm/apic.h | 7 +++++--
arch/x86/kvm/lapic.h | 4 ++--
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 68e10e30fe9b..7e0d3045e74c 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -488,11 +488,14 @@ static inline void apic_setup_apic_calls(void) { }
extern void apic_ack_irq(struct irq_data *data);
+#define APIC_VECTOR_TO_BIT_NUMBER(v) ((v) % 32)
+#define APIC_VECTOR_TO_REG_OFFSET(v) ((v) / 32 * 0x10)
+
static inline bool lapic_vector_set_in_irr(unsigned int vector)
{
- u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
+ u32 irr = apic_read(APIC_IRR + APIC_VECTOR_TO_REG_OFFSET(vector));
- return !!(irr & (1U << (vector % 32)));
+ return !!(irr & (1U << APIC_VECTOR_TO_BIT_NUMBER(vector)));
}
static inline bool is_vector_pending(unsigned int vector)
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 1a8553ebdb42..05fdf88ef55a 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -143,8 +143,8 @@ void kvm_lapic_exit(void);
u64 kvm_lapic_readable_reg_mask(struct kvm_lapic *apic);
-#define VEC_POS(v) ((v) & (32 - 1))
-#define REG_POS(v) (((v) >> 5) << 4)
+#define VEC_POS(v) APIC_VECTOR_TO_BIT_NUMBER(v)
+#define REG_POS(v) APIC_VECTOR_TO_REG_OFFSET(v)
static inline void kvm_lapic_clear_vector(int vec, void *bitmap)
{
--
2.34.1
next prev parent reply other threads:[~2025-05-14 7:18 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 7:17 [RFC PATCH v6 00/32] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-05-14 7:17 ` Neeraj Upadhyay [this message]
2025-05-14 7:17 ` [RFC PATCH v6 02/32] KVM: x86: Move find_highest_vector() to a common header Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 03/32] KVM: x86: Move lapic get/set_reg() helpers to common code Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 04/32] KVM: x86: Move lapic get/set_reg64() " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 05/32] KVM: x86: Move lapic set/clear_vector() " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 06/32] KVM: x86: Move {REG,VEC}_POS() macros to lapic.c Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 07/32] KVM: x86: apic_test_vector() to common code Neeraj Upadhyay
2025-05-24 12:12 ` Borislav Petkov
2025-05-26 3:00 ` Neeraj Upadhyay
2025-06-06 18:47 ` Sean Christopherson
2025-06-06 18:56 ` Sean Christopherson
2025-06-10 4:26 ` Neeraj Upadhyay
2025-06-10 4:25 ` Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 08/32] x86/apic: Remove redundant parentheses around 'bitmap' Neeraj Upadhyay
2025-05-24 12:14 ` Borislav Petkov
2025-05-26 3:01 ` Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 09/32] x86/apic: Rename 'reg_off' to 'reg' Neeraj Upadhyay
2025-06-09 6:35 ` Tianyu Lan
2025-05-14 7:17 ` [RFC PATCH v6 10/32] x86/apic: Change apic_*_vector() vector param to unsigned Neeraj Upadhyay
2025-05-24 12:15 ` Borislav Petkov
2025-05-26 3:01 ` Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 11/32] x86/apic: Change get/set reg operations reg " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 12/32] x86/apic: Unionize apic regs for 32bit/64bit access w/o type casting Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 13/32] x86/apic: Simplify bitwise operations on apic bitmap Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 14/32] x86/apic: Move apic_update_irq_cfg() calls to apic_update_vector() Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 15/32] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-06-10 6:52 ` Tianyu Lan
2025-05-14 7:17 ` [RFC PATCH v6 16/32] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 17/32] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 18/32] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 19/32] x86/apic: Add update_vector() callback for apic drivers Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 20/32] x86/apic: Add update_vector() callback for Secure AVIC Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 21/32] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 22/32] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 23/32] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 24/32] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 25/32] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 26/32] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 27/32] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-05-14 7:17 ` [RFC PATCH v6 28/32] x86/apic: Handle EOI writes for Secure AVIC guests Neeraj Upadhyay
2025-05-14 7:18 ` [RFC PATCH v6 29/32] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-05-14 7:18 ` [RFC PATCH v6 30/32] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-05-14 7:18 ` [RFC PATCH v6 31/32] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-06-09 7:40 ` Tianyu Lan
2025-05-14 7:18 ` [RFC PATCH v6 32/32] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay
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