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From: Borislav Petkov <bp@alien8.de>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ard Biesheuvel <ardb@kernel.org>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	Kieran Bingham <kbingham@kernel.org>,
	Michael Roth <michael.roth@amd.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Sandipan Das <sandipan.das@amd.com>,
	Juergen Gross <jgross@suse.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-efi@vger.kernel.org, linux-mm@kvack.org
Subject: Re: [PATCHv3 0/4] x86: Make 5-level paging support unconditional for x86-64
Date: Sat, 17 May 2025 11:59:47 +0200	[thread overview]
Message-ID: <20250517095947.GAaCheE9tUvgSWMhpa@fat_crate.local> (raw)
In-Reply-To: <20250516123306.3812286-1-kirill.shutemov@linux.intel.com>

On Fri, May 16, 2025 at 03:33:02PM +0300, Kirill A. Shutemov wrote:
> Both Intel and AMD CPUs support 5-level paging, which is expected to
> become more widely adopted in the future.
> 
> Remove CONFIG_X86_5LEVEL.
> 
> In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
> SPARSEMEM_VMEMMAP the only memory model.
> 
> v3:
>  - Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
>  - Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
>    to support PGTABLE_LEVELS < 5;
>  - Add Reviewed-by tags from Ard;
> v2:
>  - Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
>    #if CONFIG_PGTABLE_LEVELS > 4;
>  - Rebased onto current tip/master;
> 
> Kirill A. Shutemov (4):
>   x86/64/mm: Always use dynamic memory layout
>   x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
>   x86/64/mm: Make 5-level paging support unconditional
>   x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only

The whole set passed randbuilds testing here too, and am running boot tests on
my pile of stinky hw.

If it passes, we could queue it all.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  parent reply	other threads:[~2025-05-17 10:00 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-16 12:33 Kirill A. Shutemov
2025-05-16 12:33 ` [PATCHv3 1/4] x86/64/mm: Always use dynamic memory layout Kirill A. Shutemov
2025-05-16 13:44   ` [tip: x86/core] x86/mm/64: " tip-bot2 for Kirill A. Shutemov
2025-05-17 13:00   ` [tip: x86/merge] " tip-bot2 for Kirill A. Shutemov
2025-05-16 12:33 ` [PATCHv3 2/4] x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model Kirill A. Shutemov
2025-05-16 13:42   ` Dave Hansen
2025-05-16 13:45     ` Ingo Molnar
2025-05-16 14:59       ` Dave Hansen
2025-05-16 15:08         ` Dave Hansen
2025-05-16 14:01     ` Kirill A. Shutemov
2025-05-16 14:08       ` Ingo Molnar
2025-05-16 15:03         ` Dave Hansen
2025-05-16 15:35           ` Ingo Molnar
2025-05-16 15:46             ` Dave Hansen
2025-05-16 18:28               ` H. Peter Anvin
2025-05-16 15:01       ` Dave Hansen
2025-05-16 13:44   ` [tip: x86/core] x86/mm/64: " tip-bot2 for Kirill A. Shutemov
2025-05-17 13:00   ` [tip: x86/merge] " tip-bot2 for Kirill A. Shutemov
2025-05-16 12:33 ` [PATCHv3 3/4] x86/64/mm: Make 5-level paging support unconditional Kirill A. Shutemov
2025-05-17 13:00   ` [tip: x86/merge] x86/mm/64: " tip-bot2 for Kirill A. Shutemov
2025-05-16 12:33 ` [PATCHv3 4/4] x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only Kirill A. Shutemov
2025-05-16 12:43   ` Jürgen Groß
2025-05-17 13:00   ` [tip: x86/merge] " tip-bot2 for Kirill A. Shutemov
2025-05-16 13:11 ` [PATCHv3 0/4] x86: Make 5-level paging support unconditional for x86-64 Ingo Molnar
2025-05-16 13:17   ` Kirill A. Shutemov
2025-05-17  9:59 ` Borislav Petkov [this message]
2025-06-24  8:23 ` [PATCHv2 0/3] " Khalid Ali

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