* [PATCH] dmaengine: dw-axi-dmac: Fix CH_CFG2_H_PRIORITY_POS shift macro
@ 2025-05-19 6:07 Changhuang Liang
0 siblings, 0 replies; only message in thread
From: Changhuang Liang @ 2025-05-19 6:07 UTC (permalink / raw)
To: Vinod Koul, Eugeniy Paltsev
Cc: Andy Shevchenko, Pandith N, dmaengine, linux-kernel, Changhuang Liang
CH_PRIOR field is located in CH_CFG2 bits [51:47]. So its shift in
CH_CFG2_H_ is 15. Correct it.
Fixes: 824351668a41 ("dmaengine: dw-axi-dmac: support DMAX_NUM_CHANNELS > 8")
Cc: Pandith N <pandith.n@intel.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index b842e6a8d90d..facdfb453ffc 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -326,7 +326,7 @@ enum {
#define CH_CFG2_H_TT_FC_POS 0
#define CH_CFG2_H_HS_SEL_SRC_POS 3
#define CH_CFG2_H_HS_SEL_DST_POS 4
-#define CH_CFG2_H_PRIORITY_POS 20
+#define CH_CFG2_H_PRIORITY_POS 15
/**
* DW AXI DMA channel interrupts
--
2.25.1
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