drivers/dma/mediatek/mtk-cqdma.c:453:1-18: ERROR: nested lock+irqsave that reuses flags from line 452.

drivers/dma/mediatek/mtk-cqdma.c:453:1-18: ERROR: nested lock+irqsave that reuses flags from line 452.

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   49fffac983ac52aea0ab94914be3f56bcf92d5dc
commit: 157ae5ffd76a2857ccb4b7ce40bc5a344ca00395 dmaengine: mediatek: Fix a possible deadlock error in mtk_cqdma_tx_status()
date:   12 days ago
config: hexagon-randconfig-r061-20250526 (https://download.01.org/0day-ci/archive/20250527/202505270641.MStzJUfU-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project f819f46284f2a79790038e1f6649172789734ae8)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505270641.MStzJUfU-lkp@intel.com/

cocci warnings: (new ones prefixed by >>)
>> drivers/dma/mediatek/mtk-cqdma.c:453:1-18: ERROR: nested lock+irqsave that reuses flags from line 452.

vim +453 drivers/dma/mediatek/mtk-cqdma.c

b1f01e48df5a345 Shun-Chih Yu 2018-10-18  436  
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  437  static enum dma_status mtk_cqdma_tx_status(struct dma_chan *c,
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  438  					   dma_cookie_t cookie,
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  439  					   struct dma_tx_state *txstate)
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  440  {
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  441  	struct mtk_cqdma_vchan *cvc = to_cqdma_vchan(c);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  442  	struct mtk_cqdma_vdesc *cvd;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  443  	struct virt_dma_desc *vd;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  444  	enum dma_status ret;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  445  	unsigned long flags;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  446  	size_t bytes = 0;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  447  
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  448  	ret = dma_cookie_status(c, cookie, txstate);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  449  	if (ret == DMA_COMPLETE || !txstate)
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  450  		return ret;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  451  
157ae5ffd76a285 Qiu-ji Chen  2025-05-08 @452  	spin_lock_irqsave(&cvc->pc->lock, flags);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18 @453  	spin_lock_irqsave(&cvc->vc.lock, flags);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  454  	vd = mtk_cqdma_find_active_desc(c, cookie);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  455  	spin_unlock_irqrestore(&cvc->vc.lock, flags);
157ae5ffd76a285 Qiu-ji Chen  2025-05-08  456  	spin_unlock_irqrestore(&cvc->pc->lock, flags);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  457  
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  458  	if (vd) {
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  459  		cvd = to_cqdma_vdesc(vd);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  460  		bytes = cvd->residue;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  461  	}
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  462  
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  463  	dma_set_residue(txstate, bytes);
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  464  
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  465  	return ret;
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  466  }
b1f01e48df5a345 Shun-Chih Yu 2018-10-18  467  

:::::: The code at line 453 was first introduced by commit
:::::: b1f01e48df5a3454b88c5ff1eb4501f685351c67 dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC

:::::: TO: Shun-Chih Yu <shun-chih.yu@mediatek.com>
:::::: CC: Vinod Koul <vkoul@kernel.org>

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