Re: [PATCH v3 4/9] coresight: Appropriately disable programming clocks

[Leo Yan <leo.yan@arm.com>]

On Mon, Jun 09, 2025 at 05:11:21PM +0100, Suzuki Kuruppassery Poulose wrote:
> On 09/06/2025 17:00, Leo Yan wrote:
> > Some CoreSight components have programming clocks (pclk) and are enabled
> > using clk_get() and clk_prepare_enable().  However, in many cases, these
> > clocks are not disabled when modules exit and only released by clk_put().
> > 
> > To fix the issue, this commit refactors coresight_get_enable_apb_pclk()
> > by replacing clk_get() and clk_prepare_enable() with
> > devm_clk_get_enabled() for enabling APB clock.  Callers are updated
> > to reuse the returned error value.
> > 
> > With the change, programming clocks are managed as resources in driver
> > model layer, allowing clock cleanup to be handled automatically.  As a
> > result, manual cleanup operations are no longer needed and are removed
> > from the Coresight drivers.
> > 
> > Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver for MMIO devices")
> 
> This looks suspicious. This patch covers a lot of components, but the
> above commit is only affecting ETMv4 ?

Since commit 73d779a03a76 is the earliest patch that introduced the
issue, it has been selected as the fix tag. We assume this will cover
any subsequent changes that have the same issue.

> The patch as such looks good to me.

Thanks for review!

> Suzuki