From: "Xin Li (Intel)" <xin@zytor.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
seanjc@google.com, pbonzini@redhat.com, peterz@infradead.org,
brgerst@gmail.com, tony.luck@intel.com, fenghuay@nvidia.com
Subject: [PATCH v1 0/3] x86/traps: Fix DR6/DR7 inintialization
Date: Fri, 13 Jun 2025 00:01:14 -0700 [thread overview]
Message-ID: <20250613070118.3694407-1-xin@zytor.com> (raw)
Sohil reported seeing a split lock warning when running a test that
generates userspace #DB:
x86/split lock detection: #DB: sigtrap_loop_64/4614 took a bus_lock trap at address: 0x4011ae
We investigated the issue and identified how the false bus lock detected
warning is generated under certain test conditions:
1) The warning is a false positive.
2) It is not caused by the test itself.
3) It occurs even when Bus Lock Detection (BLD) is disabled.
4) It only happens on the first #DB on a CPU.
And the root cause is, at boot time, Linux zeros DR6. This leads to
different DR6 values depending on whether the CPU supports BLD:
1) On CPUs with BLD support, DR6 becomes 0xFFFF07F0 (bit 11, DR6.BLD,
is cleared).
2) On CPUs without BLD, DR6 becomes 0xFFFF0FF0.
Since only BLD-induced #DB exceptions clear DR6.BLD and other debug
exceptions leave it unchanged, even if the first #DB is unrelated to
BLD, DR6.BLD is still cleared. As a result, such a first #DB is
misinterpreted as a BLD #DB, and a false warning is triggerred.
Fix the bug by initializing DR6 by writing its architectural reset
value at boot time.
DR7 suffers from a similar issue. We apply the same fix.
This patch set is based on tip/x86/urgent branch as of today.
Xin Li (Intel) (3):
x86/traps: Move DR7_RESET_VALUE to <uapi/asm/debugreg.h>
x86/traps: Initialize DR7 by writing its architectural reset value
x86/traps: Initialize DR6 by writing its architectural reset value
arch/x86/coco/sev/core.c | 1 +
arch/x86/coco/sev/vc-handle.c | 1 +
arch/x86/include/asm/debugreg.h | 12 +++++-----
arch/x86/include/asm/sev-internal.h | 2 --
arch/x86/include/uapi/asm/debugreg.h | 9 ++++++-
arch/x86/kernel/cpu/common.c | 17 ++++++-------
arch/x86/kernel/hw_breakpoint.c | 8 +++----
arch/x86/kernel/kgdb.c | 4 ++--
arch/x86/kernel/process_32.c | 6 ++---
arch/x86/kernel/process_64.c | 6 ++---
arch/x86/kernel/traps.c | 36 +++++++++++++++++-----------
arch/x86/kvm/vmx/nested.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 6 ++---
arch/x86/kvm/x86.c | 4 ++--
14 files changed, 63 insertions(+), 51 deletions(-)
base-commit: 7cd9a11dd0c3d1dd225795ed1b5b53132888e7b5
--
2.49.0
next reply other threads:[~2025-06-13 7:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 7:01 Xin Li (Intel) [this message]
2025-06-13 7:01 ` [PATCH v1 1/3] x86/traps: Move DR7_RESET_VALUE to <uapi/asm/debugreg.h> Xin Li (Intel)
2025-06-13 14:18 ` Sean Christopherson
2025-06-13 17:58 ` Xin Li
2025-06-13 20:03 ` Sean Christopherson
2025-06-13 21:38 ` Xin Li
2025-06-13 7:01 ` [PATCH v1 2/3] x86/traps: Initialize DR7 by writing its architectural reset value Xin Li (Intel)
2025-06-13 7:15 ` Peter Zijlstra
2025-06-13 7:51 ` Xin Li
2025-06-13 7:59 ` H. Peter Anvin
2025-06-13 8:16 ` Peter Zijlstra
2025-06-13 14:10 ` Sean Christopherson
2025-06-13 17:36 ` Xin Li
2025-06-13 7:01 ` [PATCH v1 3/3] x86/traps: Initialize DR6 " Xin Li (Intel)
2025-06-13 7:18 ` [PATCH v1 0/3] x86/traps: Fix DR6/DR7 inintialization Peter Zijlstra
2025-06-13 7:37 ` Xin Li
2025-06-13 22:43 ` Sohil Mehta
2025-06-13 23:22 ` Xin Li
2025-06-14 3:38 ` H. Peter Anvin
2025-06-16 8:15 ` Ethan Zhao
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