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From: David Laight <david.laight.linux@gmail.com>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>,
	Tianrui Zhao <zhaotianrui@loongson.cn>,
	Xianglai Li <lixianglai@loongson.cn>,
	kvm@vger.kernel.org, loongarch@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 9/9] LoongArch: KVM: INTC: Add address alignment check
Date: Sat, 21 Jun 2025 12:20:59 +0100	[thread overview]
Message-ID: <20250621122059.6caf299a@pumpkin> (raw)
In-Reply-To: <CAAhV-H6Eru5e6+_i+4DY9qwshibY43hjbS-QC-fhLD04-4mOGw@mail.gmail.com>

On Thu, 19 Jun 2025 16:47:22 +0800
Huacai Chen <chenhuacai@kernel.org> wrote:

> Hi, Bibo,
> 
> On Wed, Jun 11, 2025 at 9:51 AM Bibo Mao <maobibo@loongson.cn> wrote:
> >
> > IOCSR instruction supports 1/2/4/8 bytes access, the address should
> > be naturally aligned with its access size. Here address alignment
> > check is added in eiointc kernel emulation.
> >
> > At the same time len must be 1/2/4/8 bytes from iocsr exit emulation
> > function kvm_emu_iocsr(), remove the default case in switch case
> > statements.  
> Robust code doesn't depend its callers do things right, so I suggest
> keeping the default case, which means we just add the alignment check
> here.

kernel code generally relies on callers to DTRT - except for values
that come from userspace.

Otherwise you get unreadable and slow code that continuously checks
for things that can't happen.

	David

> 
> And I think this patch should also Cc stable and add a Fixes tag.
> 
> 
> Huacai
> 
> >
> > Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> > ---
> >  arch/loongarch/kvm/intc/eiointc.c | 21 +++++++++++++--------
> >  1 file changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/eiointc.c
> > index 8b0d9376eb54..4e9d12300cc4 100644
> > --- a/arch/loongarch/kvm/intc/eiointc.c
> > +++ b/arch/loongarch/kvm/intc/eiointc.c
> > @@ -311,6 +311,12 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu,
> >                 return -EINVAL;
> >         }
> >
> > +       /* len must be 1/2/4/8 from function kvm_emu_iocsr() */
> > +       if (addr & (len - 1)) {
> > +               kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
> > +               return -EINVAL;
> > +       }
> > +
> >         vcpu->stat.eiointc_read_exits++;
> >         spin_lock_irqsave(&eiointc->lock, flags);
> >         switch (len) {
> > @@ -323,12 +329,9 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu,
> >         case 4:
> >                 ret = loongarch_eiointc_readl(vcpu, eiointc, addr, val);
> >                 break;
> > -       case 8:
> > +       default:
> >                 ret = loongarch_eiointc_readq(vcpu, eiointc, addr, val);
> >                 break;
> > -       default:
> > -               WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n",
> > -                                               __func__, addr, len);
> >         }
> >         spin_unlock_irqrestore(&eiointc->lock, flags);
> >
> > @@ -682,6 +685,11 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu,
> >                 return -EINVAL;
> >         }
> >
> > +       if (addr & (len - 1)) {
> > +               kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
> > +               return -EINVAL;
> > +       }
> > +
> >         vcpu->stat.eiointc_write_exits++;
> >         spin_lock_irqsave(&eiointc->lock, flags);
> >         switch (len) {
> > @@ -694,12 +702,9 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu,
> >         case 4:
> >                 ret = loongarch_eiointc_writel(vcpu, eiointc, addr, val);
> >                 break;
> > -       case 8:
> > +       default:
> >                 ret = loongarch_eiointc_writeq(vcpu, eiointc, addr, val);
> >                 break;
> > -       default:
> > -               WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n",
> > -                                               __func__, addr, len);
> >         }
> >         spin_unlock_irqrestore(&eiointc->lock, flags);
> >
> > --
> > 2.39.3
> >  
> 


  parent reply	other threads:[~2025-06-21 11:21 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-11  1:46 [PATCH v3 0/9] LoongArch: KVM: INTC: Enhancement about eiointc emulation Bibo Mao
2025-06-11  1:46 ` [PATCH v3 1/9] LoongArch: KVM: INTC: Fix interrupt route update with eiointc Bibo Mao
2025-06-11  1:46 ` [PATCH v3 2/9] LoongArch: KVM: INTC: Check interrupt route from physical cpu Bibo Mao
2025-06-11  1:46 ` [PATCH v3 3/9] LoongArch: KVM: INTC: Disable update property num_cpu and feature Bibo Mao
2025-06-11  1:46 ` [PATCH v3 4/9] LoongArch: KVM: INTC: Check validation of num_cpu from user space Bibo Mao
2025-06-19  8:46   ` Huacai Chen
2025-06-20  1:42     ` Bibo Mao
2025-06-20 14:43       ` Huacai Chen
2025-06-27  7:42         ` Bibo Mao
2025-06-27  9:04           ` Huacai Chen
2025-06-11  1:46 ` [PATCH v3 5/9] LoongArch: KVM: INTC: Avoid overflow with array index Bibo Mao
2025-06-11  1:46 ` [PATCH v3 6/9] LoongArch: KVM: INTC: Use standard bitops API with eiointc Bibo Mao
2025-06-11  1:46 ` [PATCH v3 7/9] LoongArch: KVM: INTC: Remove unused parameter len Bibo Mao
2025-06-11  1:46 ` [PATCH v3 8/9] LoongArch: KVM: INTC: Add stat information with kernel irqchip Bibo Mao
2025-06-11  1:50 ` Bibo Mao
2025-06-11  1:51 ` [PATCH v3 9/9] LoongArch: KVM: INTC: Add address alignment check Bibo Mao
2025-06-19  8:47   ` Huacai Chen
2025-06-19  9:47     ` Bibo Mao
2025-06-21 11:20     ` David Laight [this message]
2025-06-21 13:04       ` Huacai Chen
2025-06-27  1:58         ` Bibo Mao
2025-06-27  2:12         ` Bibo Mao

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