From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <x86@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
<Smita.KoralahalliChannabasappa@amd.com>,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>, <linux-acpi@vger.kernel.org>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v4 05/22] x86/mce/amd: Rename threshold restart function
Date: Tue, 24 Jun 2025 14:16:00 +0000 [thread overview]
Message-ID: <20250624-wip-mca-updates-v4-5-236dd74f645f@amd.com> (raw)
In-Reply-To: <20250624-wip-mca-updates-v4-0-236dd74f645f@amd.com>
It operates per block rather than per bank. So rename it for clarity.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Notes:
v3->v4:
* New in v4.
arch/x86/kernel/cpu/mce/amd.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 5c4eb28c3ac9..9b980aecb6b3 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -419,8 +419,8 @@ static bool lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi)
return true;
};
-/* Reprogram MCx_MISC MSR behind this threshold bank. */
-static void threshold_restart_bank(void *_tr)
+/* Reprogram MCx_MISC MSR behind this threshold block. */
+static void threshold_restart_block(void *_tr)
{
struct thresh_restart *tr = _tr;
u32 hi, lo;
@@ -478,7 +478,7 @@ static void mce_threshold_block_init(struct threshold_block *b, int offset)
};
b->threshold_limit = THRESHOLD_MAX;
- threshold_restart_bank(&tr);
+ threshold_restart_block(&tr);
};
static int setup_APIC_mce_threshold(int reserved, int new)
@@ -921,7 +921,7 @@ static void log_and_reset_block(struct threshold_block *block)
/* Reset threshold block after logging error. */
memset(&tr, 0, sizeof(tr));
tr.b = block;
- threshold_restart_bank(&tr);
+ threshold_restart_block(&tr);
}
/*
@@ -995,7 +995,7 @@ store_interrupt_enable(struct threshold_block *b, const char *buf, size_t size)
memset(&tr, 0, sizeof(tr));
tr.b = b;
- if (smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1))
+ if (smp_call_function_single(b->cpu, threshold_restart_block, &tr, 1))
return -ENODEV;
return size;
@@ -1020,7 +1020,7 @@ store_threshold_limit(struct threshold_block *b, const char *buf, size_t size)
b->threshold_limit = new;
tr.b = b;
- if (smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1))
+ if (smp_call_function_single(b->cpu, threshold_restart_block, &tr, 1))
return -ENODEV;
return size;
--
2.49.0
next prev parent reply other threads:[~2025-06-24 14:16 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 14:15 [PATCH v4 00/22] AMD MCA interrupts rework Yazen Ghannam
2025-06-24 14:15 ` [PATCH v4 01/22] x86/mce: Don't remove sysfs if thresholding sysfs init fails Yazen Ghannam
2025-06-28 11:33 ` [tip: ras/urgent] " tip-bot2 for Yazen Ghannam
2025-06-24 14:15 ` [PATCH v4 02/22] x86/mce: Restore poll settings after storm subsides Yazen Ghannam
2025-06-25 13:22 ` Nikolay Borisov
2025-06-28 11:33 ` [tip: ras/urgent] x86/mce: Ensure user polling settings are honored when restarting timer tip-bot2 for Yazen Ghannam
2025-06-24 14:15 ` [PATCH v4 03/22] x86/mce/amd: Add default names for MCA banks and blocks Yazen Ghannam
2025-06-28 11:33 ` [tip: ras/urgent] " tip-bot2 for Yazen Ghannam
2025-06-24 14:15 ` [PATCH v4 04/22] x86/mce/amd: Fix threshold limit reset Yazen Ghannam
2025-06-28 11:33 ` [tip: ras/urgent] " tip-bot2 for Yazen Ghannam
2025-06-24 14:16 ` Yazen Ghannam [this message]
2025-09-05 11:40 ` [tip: ras/core] x86/mce/amd: Rename threshold restart function tip-bot2 for Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 06/22] x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device() Yazen Ghannam
2025-06-25 14:57 ` Nikolay Borisov
2025-09-05 11:40 ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 07/22] x86/mce/amd: Remove smca_banks_map Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 08/22] x86/mce/amd: Put list_head in threshold_bank Yazen Ghannam
2025-06-25 16:52 ` Nikolay Borisov
2025-06-27 11:14 ` Nikolay Borisov
2025-06-30 12:57 ` Yazen Ghannam
2025-08-25 13:59 ` Borislav Petkov
2025-09-05 11:40 ` [tip: ras/core] " tip-bot2 for Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 09/22] x86/mce: Cleanup bank processing on init Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 10/22] x86/mce: Remove __mcheck_cpu_init_early() Yazen Ghannam
2025-06-26 8:03 ` Nikolay Borisov
2025-06-30 12:58 ` Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 11/22] x86/mce: Define BSP-only init Yazen Ghannam
2025-06-25 11:04 ` Nikolay Borisov
2025-06-25 11:26 ` Borislav Petkov
2025-06-24 14:16 ` [PATCH v4 12/22] x86/mce: Define BSP-only SMCA init Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 13/22] x86/mce: Do 'UNKNOWN' vendor check early Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 14/22] x86/mce: Separate global and per-CPU quirks Yazen Ghannam
2025-06-27 11:02 ` Nikolay Borisov
2025-06-30 13:00 ` Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 15/22] x86/mce: Move machine_check_poll() status checks to helper functions Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 16/22] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 17/22] x86/mce: Unify AMD DFR " Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 18/22] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 19/22] x86/mce/amd: Remove redundant reset_block() Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 20/22] x86/mce/amd: Define threshold restart function for banks Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 21/22] x86/mce: Handle AMD threshold interrupt storms Yazen Ghannam
2025-06-24 14:16 ` [PATCH v4 22/22] x86/mce: Save and use APEI corrected threshold limit Yazen Ghannam
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