Re: [PATCH v2 4/8] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller

[Albert Yang <yangzh0906@thundersoft.com>]

Hi Rob,

Thank you for the automated dt-binding check report.

> My bot found errors running 'make dt_binding_check' on your patch:
> 
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.example.dtb: mmc@22200000 (bst,c1200-dwcmshc-sdhci): reg: [[0, 572522496], [0, 4096], [0, 587227136], [0, 4096]] is too long
> 	from schema $id: http://devicetree.org/schemas/mmc/bst,dwcmshc-sdhci.yaml#

I have identified and fixed this issue. The problem was that the binding example used 64-bit addresses but lacked the proper bus wrapper with #address-cells and #size-cells settings.

Fix Applied:
I've wrapped the example in a proper bus node with the correct address/size-cells, following the pattern used in sdhci-am654.yaml for handling 64-bit addresses:

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    bus {
        #address-cells = <2>;
        #size-cells = <2>;

        mmc@22200000 {
            compatible = "bst,c1200-dwcmshc-sdhci";
            reg = <0x0 0x22200000 0x0 0x1000>,
                  <0x0 0x23006000 0x0 0x1000>;
            interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk_mmc>;
            clock-names = "core";
            memory-region = <&mmc0_reserved>;
            max-frequency = <200000000>;
            bus-width = <8>;
            non-removable;
            dma-coherent;
        };
    };

This approach is consistent with how sdhci-am654.yaml handles multiple reg entries with 64-bit addresses, and matches the actual usage in our bstc1200.dtsi file where the soc node defines #address-cells = <2> and #size-cells = <2>.

Verification:
After the fix, make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml passes without errors.

Best regards,
Albert Yang