From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jessica.zhang@oss.qualcomm.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Jordan Crouse <jordan@cosmicpenguin.net>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 02/12] drm/msm/disp: set num_planes and fetch_mode in INTERLEAVED_RGB_FMT
Date: Sat, 05 Jul 2025 05:47:23 +0300 [thread overview]
Message-ID: <20250705-dpu-formats-v1-2-40f0bb31b8c8@oss.qualcomm.com> (raw)
In-Reply-To: <20250705-dpu-formats-v1-0-40f0bb31b8c8@oss.qualcomm.com>
All interleaved RGB formats use only 1 plane and MDP_FETCH_LINEAR.
Specify num_planes and fetch_mode directly in the macro and remove
unused parameters.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/disp/mdp_format.c | 114 ++++++++++++----------------------
1 file changed, 39 insertions(+), 75 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp_format.c b/drivers/gpu/drm/msm/disp/mdp_format.c
index eebedb1a2636e76996cf82847b7d391cb67b0941..26be35572fd2ee7456401aa525cc36025bc52ee4 100644
--- a/drivers/gpu/drm/msm/disp/mdp_format.c
+++ b/drivers/gpu/drm/msm/disp/mdp_format.c
@@ -67,7 +67,7 @@ static struct csc_cfg csc_convert[CSC_MAX] = {
#define MDP_TILE_HEIGHT_NV12 8
#define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, uc, alpha, \
-bp, flg, fm, np) \
+bp, flg) \
{ \
.pixel_format = DRM_FORMAT_ ## fmt, \
.fetch_type = MDP_PLANE_INTERLEAVED, \
@@ -80,9 +80,9 @@ bp, flg, fm, np) \
.chroma_sample = CHROMA_FULL, \
.unpack_count = uc, \
.bpp = bp, \
- .fetch_mode = fm, \
+ .fetch_mode = MDP_FETCH_LINEAR, \
.flags = MSM_FORMAT_FLAG_UNPACK_TIGHT | flg, \
- .num_planes = np, \
+ .num_planes = 1, \
.tile_height = MDP_TILE_HEIGHT_DEFAULT \
}
@@ -228,218 +228,182 @@ static const struct msm_format mdp_formats[] = {
INTERLEAVED_RGB_FMT(ARGB8888,
BPC8A, BPC8, BPC8, BPC8,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- true, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 4, 0),
INTERLEAVED_RGB_FMT(ABGR8888,
BPC8A, BPC8, BPC8, BPC8,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- true, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 4, 0),
INTERLEAVED_RGB_FMT(XBGR8888,
BPC8A, BPC8, BPC8, BPC8,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- false, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 4, 0),
INTERLEAVED_RGB_FMT(RGBA8888,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- true, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 4, 0),
INTERLEAVED_RGB_FMT(BGRA8888,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- true, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 4, 0),
INTERLEAVED_RGB_FMT(BGRX8888,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- false, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 4, 0),
INTERLEAVED_RGB_FMT(XRGB8888,
BPC8A, BPC8, BPC8, BPC8,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- false, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 4, 0),
INTERLEAVED_RGB_FMT(RGBX8888,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- false, 4, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 4, 0),
INTERLEAVED_RGB_FMT(RGB888,
0, BPC8, BPC8, BPC8,
C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
- false, 3, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 3, 0),
INTERLEAVED_RGB_FMT(BGR888,
0, BPC8, BPC8, BPC8,
C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
- false, 3, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 3, 0),
INTERLEAVED_RGB_FMT(RGB565,
0, BPC5, BPC6, BPC5,
C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(BGR565,
0, BPC5, BPC6, BPC5,
C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(ARGB1555,
BPC1A, BPC5, BPC5, BPC5,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(ABGR1555,
BPC1A, BPC5, BPC5, BPC5,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(RGBA5551,
BPC1A, BPC5, BPC5, BPC5,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(BGRA5551,
BPC1A, BPC5, BPC5, BPC5,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(XRGB1555,
BPC1A, BPC5, BPC5, BPC5,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(XBGR1555,
BPC1A, BPC5, BPC5, BPC5,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(RGBX5551,
BPC1A, BPC5, BPC5, BPC5,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(BGRX5551,
BPC1A, BPC5, BPC5, BPC5,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(ARGB4444,
BPC4A, BPC4, BPC4, BPC4,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(ABGR4444,
BPC4A, BPC4, BPC4, BPC4,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(RGBA4444,
BPC4A, BPC4, BPC4, BPC4,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(BGRA4444,
BPC4A, BPC4, BPC4, BPC4,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- true, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ true, 2, 0),
INTERLEAVED_RGB_FMT(XRGB4444,
BPC4A, BPC4, BPC4, BPC4,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(XBGR4444,
BPC4A, BPC4, BPC4, BPC4,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(RGBX4444,
BPC4A, BPC4, BPC4, BPC4,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(BGRX4444,
BPC4A, BPC4, BPC4, BPC4,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- false, 2, 0,
- MDP_FETCH_LINEAR, 1),
+ false, 2, 0),
INTERLEAVED_RGB_FMT(BGRA1010102,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- true, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ true, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(RGBA1010102,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- true, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ true, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(ABGR2101010,
BPC8A, BPC8, BPC8, BPC8,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- true, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ true, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(ARGB2101010,
BPC8A, BPC8, BPC8, BPC8,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- true, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ true, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(XRGB2101010,
BPC8A, BPC8, BPC8, BPC8,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4,
- false, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ false, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(BGRX1010102,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4,
- false, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ false, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(XBGR2101010,
BPC8A, BPC8, BPC8, BPC8,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
- false, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ false, 4, MSM_FORMAT_FLAG_DX),
INTERLEAVED_RGB_FMT(RGBX1010102,
BPC8A, BPC8, BPC8, BPC8,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4,
- false, 4, MSM_FORMAT_FLAG_DX,
- MDP_FETCH_LINEAR, 1),
+ false, 4, MSM_FORMAT_FLAG_DX),
/* --- RGB formats above / YUV formats below this line --- */
--
2.39.5
next prev parent reply other threads:[~2025-07-05 2:47 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-05 2:47 [PATCH 00/12] drm/msm/dpu: rework format handling code Dmitry Baryshkov
2025-07-05 2:47 ` [PATCH 01/12] drm/msm/disp: set num_planes to 1 for interleaved YUV formats Dmitry Baryshkov
2025-09-04 18:39 ` Jessica Zhang
2025-07-05 2:47 ` Dmitry Baryshkov [this message]
2025-09-04 21:35 ` [PATCH 02/12] drm/msm/disp: set num_planes and fetch_mode in INTERLEAVED_RGB_FMT Jessica Zhang
2025-07-05 2:47 ` [PATCH 03/12] drm/msm/disp: set num_planes, fetch_mode and tile_height in INTERLEAVED_RGB_FMT_TILED Dmitry Baryshkov
2025-07-05 2:47 ` [PATCH 04/12] drm/msm/disp: simplify RGB{,A,X} formats definitions Dmitry Baryshkov
2025-09-04 23:05 ` Jessica Zhang
2025-09-04 23:06 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 05/12] drm/msm/disp: simplify tiled " Dmitry Baryshkov
2025-09-04 23:06 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 06/12] drm/msm/disp: pull in common YUV format parameters Dmitry Baryshkov
2025-09-04 23:07 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 07/12] drm/msm/disp: pull in common tiled " Dmitry Baryshkov
2025-09-04 22:22 ` Jessica Zhang
2025-09-04 22:37 ` Dmitry Baryshkov
2025-07-05 2:47 ` [PATCH 08/12] drm/msm/disp: drop PSEUDO_YUV_FMT_LOOSE_TILED Dmitry Baryshkov
2025-09-04 23:04 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 09/12] drm/msm/dpu: simplify _dpu_format_populate_plane_sizes_* Dmitry Baryshkov
2025-09-04 23:19 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 10/12] drm/msm/dpu: drop redundant num_planes assignment in _dpu_format_populate_plane_sizes*() Dmitry Baryshkov
2025-09-04 23:19 ` Jessica Zhang
2025-07-05 2:47 ` [PATCH 11/12] drm/msm/dpu: rewrite _dpu_format_populate_plane_sizes_ubwc() Dmitry Baryshkov
2025-07-05 17:53 ` kernel test robot
2025-07-05 2:47 ` [PATCH 12/12] drm/msm/dpu: use standard functions in _dpu_format_populate_plane_sizes_ubwc() Dmitry Baryshkov
2025-09-04 18:38 ` Jessica Zhang
2025-09-04 20:19 ` Dmitry Baryshkov
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