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From: Jonathan Cameron <jic23@kernel.org>
To: Yicong Yang <yangyicong@huawei.com>
Cc: <will@kernel.org>, <mark.rutland@arm.com>,
	<yangyicong@hisilicon.com>, <hejunhao3@huawei.com>,
	<jonathan.cameron@huawei.com>, <prime.zeng@hisilicon.com>,
	<linuxarm@huawei.com>, <wangyushan12@huawei.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [RESEND PATCH v3 0/8] General updates and two new drivers for HiSilicon Uncore PMU
Date: Sun, 13 Jul 2025 17:27:32 +0100	[thread overview]
Message-ID: <20250713172732.13100182@jic23-huawei> (raw)
In-Reply-To: <c5a99a5a-20d9-ef07-1cc3-cb025f446619@huawei.com>

On Tue, 1 Jul 2025 20:36:11 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> Hi Will and Mark,
> 
> just want to make sure the mail's not lost somehow, it's been skipped for the last cycle and
> no further comment since v2.

Hi Will and Mark,

This one is still outstanding and Yicong mentioned some recent issues with
some Huawei emails being taken out by spam filters.  As such, a quick
ping from an account that shouldn't suffer that fate!

Jonathan

> 
> thanks.
> 
> On 2025/6/19 20:55, Yicong Yang wrote:
> > From: Yicong Yang <yangyicong@hisilicon.com>
> > 
> > Support new version of DDRC/SLLC PMU identified with updated ACPI HID and
> > register definition. In order to support this, we do a preliminary refactor
> > to initialize device of each version by using driver data of each HID
> > rather than checking the version. This will also make the driver easier to
> > maintain and extend, since only the HID specific information along
> > with the new HID will be added to support the new version without touching
> > the common logic.
> > 
> > Two new Uncore PMU drivers is also added to support the monitoring the
> > events of the system bus (by NoC PMU) and the DVM operations (by MN PMU).
> > 
> > Change since v2:
> > - Rebase on 6.15-rc1, add Jonathan's tag.
> > Link: https://lore.kernel.org/linux-arm-kernel/20250321073846.23507-1-yangyicong@huawei.com/
> > 
> > Change since v1:
> > - Fold patch which extending the struct hisi_pmu_dev_info into its user
> > - Use bit shift rather than bit mask for SLLC PMU registers configuration
> > - Address other comments by Jonathan, thanks
> > Link: https://lore.kernel.org/linux-arm-kernel/20250218092000.41641-1-yangyicong@huawei.com/
> > 
> > Junhao He (6):
> >   drivers/perf: hisi: Simplify the probe process for each DDRC version
> >   drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
> >   drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU
> >     information
> >   drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver
> >   drivers/perf: hisi: Relax the event number check of v2 PMUs
> >   drivers/perf: hisi: Add support for HiSilicon MN PMU driver
> > 
> > Yicong Yang (2):
> >   drivers/perf: hisi: Support PMUs with no interrupt
> >   drivers/perf: hisi: Add support for HiSilicon NoC PMU
> > 
> >  Documentation/admin-guide/perf/hisi-pmu.rst   |  11 +
> >  drivers/perf/hisilicon/Makefile               |   3 +-
> >  drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 354 ++++++++--------
> >  drivers/perf/hisilicon/hisi_uncore_hha_pmu.c  |   6 +-
> >  drivers/perf/hisilicon/hisi_uncore_mn_pmu.c   | 355 ++++++++++++++++
> >  drivers/perf/hisilicon/hisi_uncore_noc_pmu.c  | 392 ++++++++++++++++++
> >  drivers/perf/hisilicon/hisi_uncore_pa_pmu.c   |   2 +-
> >  drivers/perf/hisilicon/hisi_uncore_pmu.c      |  11 +-
> >  drivers/perf/hisilicon/hisi_uncore_pmu.h      |   2 +
> >  drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 220 +++++++---
> >  10 files changed, 1098 insertions(+), 258 deletions(-)
> >  create mode 100644 drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
> >  create mode 100644 drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
> >   
> 


  reply	other threads:[~2025-07-13 16:27 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-19 12:55 Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 1/8] drivers/perf: hisi: Simplify the probe process for each DDRC version Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 2/8] drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 3/8] drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 4/8] drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 5/8] drivers/perf: hisi: Relax the event number check of v2 PMUs Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 6/8] drivers/perf: hisi: Support PMUs with no interrupt Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 7/8] drivers/perf: hisi: Add support for HiSilicon NoC PMU Yicong Yang
2025-07-14 15:11   ` Will Deacon
2025-07-15  8:09     ` Yicong Yang
2025-06-19 12:55 ` [RESEND PATCH v3 8/8] drivers/perf: hisi: Add support for HiSilicon MN PMU driver Yicong Yang
2025-07-01 12:36 ` [RESEND PATCH v3 0/8] General updates and two new drivers for HiSilicon Uncore PMU Yicong Yang
2025-07-13 16:27   ` Jonathan Cameron [this message]
2025-07-13 20:02     ` Will Deacon
2025-07-14 15:10 ` Will Deacon
  -- strict thread matches above, loose matches on Subject: below --
2025-04-25  9:00 Yicong Yang
2025-05-12  8:42 ` Yicong Yang

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