From: Judith Mendez <jm@ti.com>
To: Judith Mendez <jm@ti.com>, Nishanth Menon <nm@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulf.hansson@linaro.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mmc@vger.kernel.org>
Subject: [PATCH 1/4] dt-bindings: hwinfo: Add second register range for GP_SW
Date: Tue, 5 Aug 2025 18:49:47 -0500 [thread overview]
Message-ID: <20250805234950.3781367-2-jm@ti.com> (raw)
In-Reply-To: <20250805234950.3781367-1-jm@ti.com>
This adds a second register range in ti,k3-socinfo. This register
range can also be used to detect silicon revisions.
AM62px SR1.0, SR1.1, and SR1.2 can only be distinguished with GP_SW
registers, so increase maximum items to 2 for reg property and update
the example.
Signed-off-by: Judith Mendez <jm@ti.com>
---
.../devicetree/bindings/hwinfo/ti,k3-socinfo.yaml | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
index dada28b47ea0..3b656fc0cb5a 100644
--- a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
+++ b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml
@@ -24,7 +24,8 @@ properties:
- const: ti,am654-chipid
reg:
- maxItems: 1
+ maxItems: 2
+ minItems: 1
required:
- compatible
@@ -34,7 +35,9 @@ additionalProperties: false
examples:
- |
- chipid@43000014 {
+ chipid@14 {
compatible = "ti,am654-chipid";
- reg = <0x43000014 0x4>;
+ reg = <0x43000014 0x4>,
+ <0x43000230 0x10>;
+ bootph-all;
};
--
2.49.0
next prev parent reply other threads:[~2025-08-05 23:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 23:49 [PATCH 0/4] Add support for AM62P SR1.2 Judith Mendez
2025-08-05 23:49 ` Judith Mendez [this message]
2025-08-06 6:40 ` [PATCH 1/4] dt-bindings: hwinfo: Add second register range for GP_SW Krzysztof Kozlowski
2025-08-06 15:24 ` Judith Mendez
2025-08-07 8:22 ` Krzysztof Kozlowski
2025-08-05 23:49 ` [PATCH 2/4] soc: ti: k3-socinfo: Add support for AM62P variants Judith Mendez
2025-08-07 17:24 ` Andrew Davis
2025-08-07 22:29 ` Judith Mendez
2025-08-05 23:49 ` [PATCH 3/4] mmc: sdhci_am654: Disable HS400 for AM62P SR1.0 and SR1.1 Judith Mendez
2025-08-07 17:28 ` Andrew Davis
2025-08-07 22:14 ` Judith Mendez
2025-08-05 23:49 ` [PATCH 4/4] arm64: dts: ti: k3-am62p-j722s-common-wakeup: Add GP_SW reg range to chipid node Judith Mendez
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