From: Sean Christopherson <seanjc@google.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org
Cc: linux-kernel@vger.kernel.org, Dan Snyder <dansnyder@google.com>,
Sean Christopherson <seanjc@google.com>
Subject: [PATCH 3/3] *** DO NOT MERGE *** x86/umip: Lazy person's KUnit test for UMIP emulation
Date: Fri, 8 Aug 2025 10:23:58 -0700 [thread overview]
Message-ID: <20250808172358.1938974-4-seanjc@google.com> (raw)
In-Reply-To: <20250808172358.1938974-1-seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
arch/x86/kernel/umip.c | 56 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/x86/kernel/umip.c b/arch/x86/kernel/umip.c
index d432f3824f0c..26621d5ea308 100644
--- a/arch/x86/kernel/umip.c
+++ b/arch/x86/kernel/umip.c
@@ -194,6 +194,62 @@ static int identify_insn(struct insn *insn)
}
}
+static __init int umip_identify_insn(const unsigned char *buf)
+{
+ struct insn insn = {
+ .addr_bytes = 8,
+ .opnd_bytes = 4,
+ };
+ int r;
+
+ insn_init(&insn, buf, MAX_INSN_SIZE, 1);
+
+ r = insn_get_length(&insn);
+ if (r) {
+ pr_warn("insn_get_length returned '%d'\n", r);
+ return r;
+ }
+
+ return identify_insn(&insn);
+}
+
+static __init int umip_insn_test(void)
+{
+ unsigned char vpalignr[MAX_INSN_SIZE] = { 0x62, 0x83, 0xc5, 0x05, 0x0f, 0x08, 0xff };
+ unsigned char insn_0f00[MAX_INSN_SIZE] = { 0x0f, 0x00 };
+ unsigned char insn_0f01[MAX_INSN_SIZE] = { 0x0f, 0x01 };
+ int r, i;
+
+ r = umip_identify_insn(vpalignr);
+ WARN_ON(r != -EINVAL);
+
+ for (i = 0; i <= 0xff; i++) {
+ insn_0f00[2] = i;
+ r = umip_identify_insn(insn_0f00);
+ if (X86_MODRM_REG(i) > 1)
+ WARN_ON(r != -EINVAL);
+ else if (X86_MODRM_REG(i) == 0)
+ WARN_ON(r != UMIP_INST_SLDT);
+ else
+ WARN_ON(r != UMIP_INST_STR);
+
+ insn_0f01[2] = i;
+ r = umip_identify_insn(insn_0f01);
+ if (X86_MODRM_REG(i) == 2 || X86_MODRM_REG(i) == 3 || X86_MODRM_REG(i) > 4)
+ WARN_ON(r != -EINVAL);
+ else if (X86_MODRM_REG(i) < 2 && i >= 0xc0)
+ WARN_ON(r != -EINVAL);
+ else if (X86_MODRM_REG(i) == 0)
+ WARN_ON(r != UMIP_INST_SGDT);
+ else if (X86_MODRM_REG(i) == 1)
+ WARN_ON(r != UMIP_INST_SIDT);
+ else
+ WARN_ON(r != UMIP_INST_SMSW);
+ }
+ return 0;
+}
+subsys_initcall(umip_insn_test);
+
/**
* emulate_umip_insn() - Emulate UMIP instructions and return dummy values
* @insn: Instruction structure with operands
--
2.50.1.703.g449372360f-goog
next prev parent reply other threads:[~2025-08-08 17:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-08 17:23 [PATCH 0/3] x86/umip: Fix UMIP insn decoder false positives Sean Christopherson
2025-08-08 17:23 ` [PATCH 1/3] x86/umip: Check that the instruction opcode is at least two bytes Sean Christopherson
2025-08-14 14:42 ` Peter Zijlstra
2025-09-19 18:16 ` Borislav Petkov
2025-09-19 21:24 ` Sean Christopherson
2025-09-20 10:07 ` Borislav Petkov
2025-09-19 19:55 ` [tip: x86/cpu] " tip-bot2 for Sean Christopherson
2025-08-08 17:23 ` [PATCH 2/3] x86/umip: Fix decoding of register forms of 0F 01 (SGDT and SIDT aliases) Sean Christopherson
2025-08-14 14:42 ` Peter Zijlstra
2025-09-19 19:55 ` [tip: x86/cpu] " tip-bot2 for Sean Christopherson
2025-08-08 17:23 ` Sean Christopherson [this message]
2025-09-19 14:31 ` [PATCH 0/3] x86/umip: Fix UMIP insn decoder false positives Sean Christopherson
2025-09-19 14:46 ` Borislav Petkov
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