From: fangyu.yu@linux.alibaba.com
To: anup@brainfault.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
atishp@atishpatra.org, tjeznach@rivosinc.com, joro@8bytes.org,
will@kernel.org, robin.murphy@arm.com, sunilvl@ventanamicro.com,
rafael.j.wysocki@intel.com, tglx@linutronix.de,
ajones@ventanamicro.com
Cc: guoren@linux.alibaba.com, guoren@kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
Fangyu Yu <fangyu.yu@linux.alibaba.com>
Subject: [RFC PATCH 4/6] iommu/riscv: Add irq_mask and irq_ack configure for iommu-ir
Date: Mon, 11 Aug 2025 14:11:02 +0800 [thread overview]
Message-ID: <20250811061104.10326-5-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <20250811061104.10326-1-fangyu.yu@linux.alibaba.com>
From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
The irq_mask and irq_ack are required for host irq to be triggered
under the host system.
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
---
drivers/iommu/riscv/iommu-ir.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/riscv/iommu-ir.c b/drivers/iommu/riscv/iommu-ir.c
index 5461dbe18159..73f552ed5b65 100644
--- a/drivers/iommu/riscv/iommu-ir.c
+++ b/drivers/iommu/riscv/iommu-ir.c
@@ -208,6 +208,7 @@ static struct irq_chip riscv_iommu_irq_chip = {
.irq_unmask = irq_chip_unmask_parent,
.irq_set_affinity = irq_chip_set_affinity_parent,
.irq_set_vcpu_affinity = riscv_iommu_irq_set_vcpu_affinity,
+ .irq_ack = irq_chip_ack_parent,
};
static int riscv_iommu_irq_domain_alloc_irqs(struct irq_domain *irqdomain,
@@ -239,7 +240,9 @@ static const struct msi_parent_ops riscv_iommu_msi_parent_ops = {
.supported_flags = MSI_GENERIC_FLAGS_MASK |
MSI_FLAG_PCI_MSIX,
.required_flags = MSI_FLAG_USE_DEF_DOM_OPS |
- MSI_FLAG_USE_DEF_CHIP_OPS,
+ MSI_FLAG_USE_DEF_CHIP_OPS |
+ MSI_FLAG_PCI_MSI_MASK_PARENT,
+ .chip_flags = MSI_CHIP_FLAG_SET_ACK,
.init_dev_msi_info = msi_parent_init_dev_msi_info,
};
--
2.49.0
next prev parent reply other threads:[~2025-08-11 6:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-11 6:10 [RFC PATCH 0/6] iommu/riscv: Add MRIF support fangyu.yu
2025-08-11 6:10 ` [RFC PATCH 1/6] RISC-V: Add more elements to irqbypass vcpu_info fangyu.yu
2025-08-11 6:11 ` [RFC PATCH 2/6] RISC-V: KVM: Transfer the physical address of MRIF to iommu-ir fangyu.yu
2025-08-11 6:11 ` [RFC PATCH 3/6] RISC-V: KVM: Add a xarray to record host irq msg fangyu.yu
2025-08-11 6:11 ` fangyu.yu [this message]
2025-08-11 6:11 ` [RFC PATCH 5/6] iommu/riscv: Add MRIF mode support fangyu.yu
2025-08-11 6:11 ` [RFC PATCH 6/6] RISC-V: KVM: Check the MRIF in notice MSI irq handler fangyu.yu
2026-07-01 4:00 ` [RFC PATCH 0/3] RISC-V: KVM/IOMMU: Fix MRIF irqfd notice handling Zhanpeng Zhang
2026-07-01 4:00 ` [RFC PATCH 1/3] iommu/riscv: Complete MRIF MSI PTE setup Zhanpeng Zhang
2026-07-01 4:00 ` [RFC PATCH 2/3] KVM: Move irqfd arch data into route snapshots Zhanpeng Zhang
2026-07-01 4:00 ` [RFC PATCH 3/3] RISC-V: KVM: Identify MRIF notices from irqfd snapshots Zhanpeng Zhang
2026-07-03 12:38 ` [RFC PATCH 0/3] RISC-V: KVM/IOMMU: Fix MRIF irqfd notice handling fangyu.yu
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