From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Borislav Petkov <bp@alien8.de>, Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"H. Peter Anvin" <hpa@zytor.com>,
David Woodhouse <dwmw2@infradead.org>,
Sean Christopherson <seanjc@google.com>,
Peter Zijlstra <peterz@infradead.org>,
Sohil Mehta <sohil.mehta@intel.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>,
"Ahmed S. Darwish" <darwi@linutronix.de>
Subject: [PATCH v4 02/34] ASoC: Intel: avs: Include CPUID header at file scope
Date: Fri, 15 Aug 2025 09:01:55 +0200 [thread overview]
Message-ID: <20250815070227.19981-3-darwi@linutronix.de> (raw)
In-Reply-To: <20250815070227.19981-1-darwi@linutronix.de>
Commit
cbe37a4d2b3c ("ASoC: Intel: avs: Configure basefw on TGL-based platforms")
includes the main CPUID header from within a C function. This works by
luck and forbids valid refactorings inside the CPUID header.
Include the CPUID header at file scope instead.
Note, for the CPUID(0x15) leaf number, use CPUID_LEAF_TSC instead of
defining a custom local macro for it.
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
sound/soc/intel/avs/tgl.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/sound/soc/intel/avs/tgl.c b/sound/soc/intel/avs/tgl.c
index 9dbb3ad0954a..cf19d3a7ced2 100644
--- a/sound/soc/intel/avs/tgl.c
+++ b/sound/soc/intel/avs/tgl.c
@@ -10,8 +10,6 @@
#include "avs.h"
#include "messages.h"
-#define CPUID_TSC_LEAF 0x15
-
static int avs_tgl_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
{
core_mask &= AVS_MAIN_CORE_MASK;
@@ -39,22 +37,31 @@ static int avs_tgl_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stal
return avs_dsp_core_stall(adev, core_mask, stall);
}
+#ifdef CONFIG_X86
+#include <asm/cpuid/api.h>
+static unsigned int intel_crystal_freq_hz(void)
+{
+ return cpuid_ecx(CPUID_LEAF_TSC);
+}
+#else
+static unsigned int intel_crystal_freq_hz(void)
+{
+ return 0;
+}
+#endif /* !CONFIG_X86 */
+
static int avs_tgl_config_basefw(struct avs_dev *adev)
{
+ unsigned int freq = intel_crystal_freq_hz();
struct pci_dev *pci = adev->base.pci;
struct avs_bus_hwid hwid;
int ret;
-#ifdef CONFIG_X86
- unsigned int ecx;
-#include <asm/cpuid/api.h>
- ecx = cpuid_ecx(CPUID_TSC_LEAF);
- if (ecx) {
- ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(ecx), &ecx);
+ if (freq) {
+ ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(freq), &freq);
if (ret)
return AVS_IPC_RET(ret);
}
-#endif
hwid.device = pci->device;
hwid.subsystem = pci->subsystem_vendor | (pci->subsystem_device << 16);
--
2.50.1
next prev parent reply other threads:[~2025-08-15 7:05 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-15 7:01 [PATCH v4 00/34] x86: Introduce a centralized CPUID data model Ahmed S. Darwish
2025-08-15 7:01 ` [PATCH v4 01/34] x86/cpuid: Remove transitional <asm/cpuid.h> header Ahmed S. Darwish
2025-08-15 10:11 ` [tip: x86/urgent] " tip-bot2 for Ahmed S. Darwish
2025-08-15 15:22 ` tip-bot2 for Ahmed S. Darwish
2025-08-15 7:01 ` Ahmed S. Darwish [this message]
2025-08-18 14:56 ` [PATCH v4 02/34] ASoC: Intel: avs: Include CPUID header at file scope Borislav Petkov
2025-08-18 15:14 ` Ahmed S. Darwish
2025-08-15 7:01 ` [PATCH v4 03/34] treewide: Explicitly include the x86 CPUID headers Ahmed S. Darwish
2025-08-15 7:01 ` [PATCH v4 04/34] x86/cpu: <asm/processor.h>: Do not include the CPUID API header Ahmed S. Darwish
2025-08-15 7:01 ` [PATCH v4 05/34] x86/cpuid: Rename cpuid_leaf()/cpuid_subleaf() APIs Ahmed S. Darwish
2025-08-15 7:01 ` [PATCH v4 06/34] x86/cpuid: Introduce <asm/cpuid/leaf_types.h> Ahmed S. Darwish
2025-08-25 14:18 ` Borislav Petkov
2025-08-25 14:56 ` Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 07/34] x86/cpuid: Introduce a centralized CPUID data model Ahmed S. Darwish
2025-08-15 15:34 ` Sean Christopherson
2025-08-18 13:49 ` Ahmed S. Darwish
2025-08-18 18:44 ` Sean Christopherson
2025-08-18 19:54 ` Ahmed S. Darwish
2025-08-18 21:29 ` Sean Christopherson
2025-08-19 13:10 ` Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 08/34] x86/cpuid: Introduce a centralized CPUID parser Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 09/34] x86/cpu: Use parsed CPUID(0x0) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 10/34] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 11/34] x86/cpu: Use parsed CPUID(0x1) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 12/34] x86/cpuid: Parse CPUID(0x80000000) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 13/34] x86/cpu: Use parsed CPUID(0x80000000) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 14/34] x86/cpuid: Introduce a CPUID leaf x86 vendor table Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 15/34] x86/cpuid: Introduce CPUID parser debugfs interface Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 16/34] x86/cpuid: Parse CPUID(0x2) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 17/34] x86/cpuid: Warn once on invalid CPUID(0x2) iteration count Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 18/34] x86/cpuid: Introduce parsed CPUID(0x2) API Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 19/34] x86/cpu: Use parsed CPUID(0x2) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 20/34] x86/cacheinfo: " Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 21/34] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 22/34] x86/cpuid: Parse 'deterministic cache parameters' CPUID leaves Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 23/34] x86/cacheinfo: Pass a 'struct cpuinfo_x86' refrence to CPUID(0x4) code Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 24/34] x86/cacheinfo: Use parsed CPUID(0x4) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 25/34] x86/cacheinfo: Use parsed CPUID(0x8000001d) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 26/34] x86/cpuid: Parse CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 27/34] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 28/34] x86/cacheinfo: Use parsed CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-08-15 15:25 ` Dave Hansen
2025-08-18 15:38 ` Ahmed S. Darwish
2025-08-18 15:52 ` David Woodhouse
2025-08-18 17:00 ` Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 29/34] x86/amd_nb: Trickle down 'struct cpuinfo_x86' reference Ahmed S. Darwish
2025-08-18 2:54 ` kernel test robot
2025-08-18 14:47 ` Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 30/34] x86/cpuid: Use parsed CPUID(0x80000006) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 31/34] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 32/34] x86/cpu: Rescan CPUID table after unlocking full CPUID range Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 33/34] x86/cpuid: Parse CPUID(0x16) Ahmed S. Darwish
2025-08-15 7:02 ` [PATCH v4 34/34] x86/tsc: Use parsed CPUID(0x16) Ahmed S. Darwish
2025-08-16 9:59 ` [PATCH v4 00/34] x86: Introduce a centralized CPUID data model David Woodhouse
2025-08-18 16:37 ` Ahmed S. Darwish
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