[PATCH 0/3] OPP: Support more speed grades and silicon revisions

[PATCH 0/3] OPP: Support more speed grades and silicon revisions

[Judith Mendez]

As the AM62x, AM62ax, and AM62px SoC families mature, more speed
grades are established and more silicon revisions are released. This
patch series adds support for more speed grades on AM62Px SoCs in
ti-cpufreq. Also allow all silicon revisions across AM62x, AM62Px,
and AM62Ax SoCs to use the already established OPPs and instead determine
approprate OPP application with speed grade efuse parsing.

Also fix 1GHz OPP which according to device datasheet [0], also supports
speed grade "O".

[0] https://www.ti.com/lit/gpn/am62p

Judith Mendez (3):
  cpufreq: ti: Support more speed grades on AM62Px SoC
  cpufreq: ti: Allow all silicon revisions to support OPPs
  arm64: dts: ti: k3-am62p: Fix supported hardware for 1GHz OPP

 arch/arm64/boot/dts/ti/k3-am62p5.dtsi |  2 +-
 drivers/cpufreq/ti-cpufreq.c          | 10 +++++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

-- 
2.49.0

[PATCH 1/3] cpufreq: ti: Support more speed grades on AM62Px SoC

[Judith Mendez]

As the AM62Px SoC family matures more speed grades are being defined.
Add support for speed grades U and T which both support all currently
established OPPs.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/cpufreq/ti-cpufreq.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index 5a5147277cd0..f7be09dc63e3 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -72,7 +72,9 @@ enum {
 
 #define AM62P5_EFUSE_O_MPU_OPP			15
 #define AM62P5_EFUSE_S_MPU_OPP			19
+#define AM62P5_EFUSE_T_MPU_OPP			20
 #define AM62P5_EFUSE_U_MPU_OPP			21
+#define AM62P5_EFUSE_V_MPU_OPP			22
 
 #define AM62P5_SUPPORT_O_MPU_OPP		BIT(0)
 #define AM62P5_SUPPORT_U_MPU_OPP		BIT(2)
@@ -153,7 +155,9 @@ static unsigned long am62p5_efuse_xlate(struct ti_cpufreq_data *opp_data,
 	unsigned long calculated_efuse = AM62P5_SUPPORT_O_MPU_OPP;
 
 	switch (efuse) {
+	case AM62P5_EFUSE_V_MPU_OPP:
 	case AM62P5_EFUSE_U_MPU_OPP:
+	case AM62P5_EFUSE_T_MPU_OPP:
 	case AM62P5_EFUSE_S_MPU_OPP:
 		calculated_efuse |= AM62P5_SUPPORT_U_MPU_OPP;
 		fallthrough;
-- 
2.49.0

[PATCH 2/3] cpufreq: ti: Allow all silicon revisions to support OPPs

[Judith Mendez]

More silicon revisions are being defined for AM62x, AM62Px, and AM62ax
SoCs. These silicon may also support currently establishes OPPs, so remove
the revision limitation in ti-cpufreq and thus determine if an OPP applies
with speed grade efuse parsing.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/cpufreq/ti-cpufreq.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index f7be09dc63e3..90c896d02649 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -311,9 +311,9 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
 };
 
 static const struct soc_device_attribute k3_cpufreq_soc[] = {
-	{ .family = "AM62X", .revision = "SR1.0" },
-	{ .family = "AM62AX", .revision = "SR1.0" },
-	{ .family = "AM62PX", .revision = "SR1.0" },
+	{ .family = "AM62X", },
+	{ .family = "AM62AX", },
+	{ .family = "AM62PX", },
 	{ /* sentinel */ }
 };
 
-- 
2.49.0

Re: [PATCH 2/3] cpufreq: ti: Allow all silicon revisions to support OPPs

[Viresh Kumar]

On 18-08-25, 14:26, Judith Mendez wrote:
> More silicon revisions are being defined for AM62x, AM62Px, and AM62ax
> SoCs. These silicon may also support currently establishes OPPs, so remove
> the revision limitation in ti-cpufreq and thus determine if an OPP applies
> with speed grade efuse parsing.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  drivers/cpufreq/ti-cpufreq.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
> index f7be09dc63e3..90c896d02649 100644
> --- a/drivers/cpufreq/ti-cpufreq.c
> +++ b/drivers/cpufreq/ti-cpufreq.c
> @@ -311,9 +311,9 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
>  };
>  
>  static const struct soc_device_attribute k3_cpufreq_soc[] = {
> -	{ .family = "AM62X", .revision = "SR1.0" },
> -	{ .family = "AM62AX", .revision = "SR1.0" },
> -	{ .family = "AM62PX", .revision = "SR1.0" },
> +	{ .family = "AM62X", },
> +	{ .family = "AM62AX", },
> +	{ .family = "AM62PX", },
>  	{ /* sentinel */ }
>  };

This got a minor conflict, fixed it as:

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index d6bd0d2dcf15..6ee76f5fe9c5 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -311,10 +311,10 @@ static struct ti_cpufreq_soc_data am3517_soc_data = {
 };

 static const struct soc_device_attribute k3_cpufreq_soc[] = {
-       { .family = "AM62X", .revision = "SR1.0" },
-       { .family = "AM62AX", .revision = "SR1.0" },
-       { .family = "AM62PX", .revision = "SR1.0" },
-       { .family = "AM62DX", .revision = "SR1.0" },
+       { .family = "AM62X", },
+       { .family = "AM62AX", },
+       { .family = "AM62PX", },
+       { .family = "AM62DX", },
        { /* sentinel */ }

-- 
viresh

[PATCH 3/3] arm64: dts: ti: k3-am62p: Fix supported hardware for 1GHz OPP

[Judith Mendez]

The 1GHz OPP is supported on speed grade "O" as well according to the
device datasheet [0], so fix the opp-supported-hw property to support
this speed grade for 1GHz OPP.

[0] https://www.ti.com/lit/gpn/am62p
Fixes: 76d855f05801 ("arm64: dts: ti: k3-am62p: add opp frequencies")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
index 202378d9d5cf..8982a7b9f1a6 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
@@ -135,7 +135,7 @@ opp-800000000 {
 
 		opp-1000000000 {
 			opp-hz = /bits/ 64 <1000000000>;
-			opp-supported-hw = <0x01 0x0006>;
+			opp-supported-hw = <0x01 0x0007>;
 			clock-latency-ns = <6000000>;
 		};
 
-- 
2.49.0

Re: [PATCH 0/3] OPP: Support more speed grades and silicon revisions

[Viresh Kumar]

On 18-08-25, 14:26, Judith Mendez wrote:
> As the AM62x, AM62ax, and AM62px SoC families mature, more speed
> grades are established and more silicon revisions are released. This
> patch series adds support for more speed grades on AM62Px SoCs in
> ti-cpufreq. Also allow all silicon revisions across AM62x, AM62Px,
> and AM62Ax SoCs to use the already established OPPs and instead determine
> approprate OPP application with speed grade efuse parsing.
> 
> Also fix 1GHz OPP which according to device datasheet [0], also supports
> speed grade "O".
> 
> [0] https://www.ti.com/lit/gpn/am62p
> 
> Judith Mendez (3):
>   cpufreq: ti: Support more speed grades on AM62Px SoC
>   cpufreq: ti: Allow all silicon revisions to support OPPs
>   arm64: dts: ti: k3-am62p: Fix supported hardware for 1GHz OPP

Applied. Thanks.

-- 
viresh