From: Yijie Yang <yijie.yang@oss.qualcomm.com>
To: Vinod Koul <vkoul@kernel.org>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Richard Cochran <richardcochran@gmail.com>
Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
stable+noautosel@kernel.org,
Yijie Yang <yijie.yang@oss.qualcomm.com>
Subject: [PATCH v4 1/6] net: stmmac: Add support for 10 Mbps and 100 Mbps Ethernet speeds
Date: Tue, 19 Aug 2025 14:35:56 +0800 [thread overview]
Message-ID: <20250819-qcs615_eth-v4-1-5050ed3402cb@oss.qualcomm.com> (raw)
In-Reply-To: <20250819-qcs615_eth-v4-0-5050ed3402cb@oss.qualcomm.com>
The DLL is a Qualcomm-specific hardware component integrated within the
MAC and should be configured in bypass mode for 10 Mbps and 100 Mbps
speeds. If not bypassed, the timing delay will be incorrectly applied,
which will disrupt signal sampling.
Fixes: a7c30e62d4b8 ("net: stmmac: Add driver for Qualcomm ethqos")
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index d8fd4d8f6ced..a4ea72f86ca8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -64,6 +64,9 @@
#define SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW BIT(1)
#define SDCC_DLL_CONFIG2_DDR_CAL_EN BIT(0)
+/* SDCC_USR_CTL fields */
+#define SDCC_USR_CTL_DLL_BYPASS BIT(30)
+
/* SDC4_STATUS bits */
#define SDC4_STATUS_DLL_LOCK BIT(7)
@@ -609,6 +612,17 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos, int speed)
if (speed == SPEED_1000)
ethqos_dll_configure(ethqos);
+ /* The DLL (Delay Locked Loop) aligns the clock and samples data
+ * in RGMII interfaces. It should be bypassed for 10 Mbps and
+ * 100 Mbps speeds.
+ */
+ if (speed == SPEED_10 || speed == SPEED_100) {
+ rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_DLL_CONFIG_PDN,
+ SDCC_HC_REG_DLL_CONFIG);
+ rgmii_updatel(ethqos, SDCC_USR_CTL_DLL_BYPASS,
+ SDCC_USR_CTL_DLL_BYPASS, SDCC_USR_CTL);
+ }
+
ethqos_rgmii_macro_init(ethqos, speed);
return 0;
--
2.34.1
next prev parent reply other threads:[~2025-08-19 6:36 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-19 6:35 [PATCH v4 0/6] Enable ethernet on qcs615 Yijie Yang
2025-08-19 6:35 ` Yijie Yang [this message]
2025-08-19 6:35 ` [PATCH v4 2/6] net: stmmac: Inverse the phy-mode definition Yijie Yang
2025-08-19 16:20 ` Andrew Lunn
2025-08-21 2:22 ` Yijie Yang
2025-08-21 3:33 ` Andrew Lunn
2025-08-19 6:35 ` [PATCH v4 3/6] arm64: dts: qcom: qcs615: add ethernet node YijieYang
2025-08-19 6:44 ` Krzysztof Kozlowski
2025-08-19 6:51 ` Yijie Yang
2025-08-19 7:15 ` Krzysztof Kozlowski
2025-08-19 9:04 ` Yijie Yang
2025-08-19 9:08 ` Krzysztof Kozlowski
2025-08-20 8:57 ` Yijie Yang
2025-08-20 13:08 ` Krzysztof Kozlowski
2025-08-19 6:35 ` [PATCH v4 4/6] arm64: dts: qcom: qcs615-ride: Enable " YijieYang
2025-08-19 16:24 ` Andrew Lunn
2025-08-20 3:18 ` Yijie Yang
2025-08-19 6:36 ` [PATCH v4 5/6] arm64: dts: qcom: qcs404: Inverse phy-mode for EVB-4000 Yijie Yang
2025-08-19 6:36 ` [PATCH v4 6/6] arm64: dts: qcom: sa8155p-adp: Inverse phy-mode Yijie Yang
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