* [PATCH RFC] drm/msm: Workaround IFPC counters bug
@ 2025-10-10 17:49 Anna Maniscalco
2025-10-10 18:24 ` Konrad Dybcio
2025-10-10 18:26 ` Konrad Dybcio
0 siblings, 2 replies; 3+ messages in thread
From: Anna Maniscalco @ 2025-10-10 17:49 UTC (permalink / raw)
To: Rob Clark, Sean Paul, Konrad Dybcio, Dmitry Baryshkov,
Abhinav Kumar, Jessica Zhang, Marijn Suijten, David Airlie,
Simona Vetter
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel, Anna Maniscalco
When keepalive vote is set to false IFPC will be re-enabled even if the
perfcounter oob vote is set.
Workaround this by not setting keepalive vote when sysprof is active.
---
I have little confidence that this is the proper solution hence why
this is an RFC.
Hopefully something better can be found.
Signed-off-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c b/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
index afc5f4aa3b17334027f3c20072cc3f059a9733b7..975b91e2c439f659b7f716cff87f73d389641d91 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
@@ -191,7 +191,8 @@ void a6xx_preempt_irq(struct msm_gpu *gpu)
set_preempt_state(a6xx_gpu, PREEMPT_NONE);
- a6xx_preempt_keepalive_vote(gpu, false);
+ if (refcount_read(&a6xx_gpu->base.base.sysprof_active) <= 0)
+ a6xx_preempt_keepalive_vote(gpu, false);
trace_msm_gpu_preemption_irq(a6xx_gpu->cur_ring->id);
---
base-commit: b5bad77e1e3c7249e4c0c88f98477e1ee7669b63
change-id: 20251010-ifpc_counters_fix-8bd4470e6351
Best regards,
--
Anna Maniscalco <anna.maniscalco2000@gmail.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH RFC] drm/msm: Workaround IFPC counters bug
2025-10-10 17:49 [PATCH RFC] drm/msm: Workaround IFPC counters bug Anna Maniscalco
@ 2025-10-10 18:24 ` Konrad Dybcio
2025-10-10 18:26 ` Konrad Dybcio
1 sibling, 0 replies; 3+ messages in thread
From: Konrad Dybcio @ 2025-10-10 18:24 UTC (permalink / raw)
To: Anna Maniscalco, Rob Clark, Sean Paul, Konrad Dybcio,
Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Marijn Suijten,
David Airlie, Simona Vetter
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 10/10/25 7:49 PM, Anna Maniscalco wrote:
> When keepalive vote is set to false IFPC will be re-enabled even if the
> perfcounter oob vote is set.
>
> Workaround this by not setting keepalive vote when sysprof is active.
>
> ---
> I have little confidence that this is the proper solution hence why
> this is an RFC.
>
> Hopefully something better can be found.
>
> Signed-off-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
Your sign-off is in the non-git-logged section here as well
Konrad
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH RFC] drm/msm: Workaround IFPC counters bug
2025-10-10 17:49 [PATCH RFC] drm/msm: Workaround IFPC counters bug Anna Maniscalco
2025-10-10 18:24 ` Konrad Dybcio
@ 2025-10-10 18:26 ` Konrad Dybcio
1 sibling, 0 replies; 3+ messages in thread
From: Konrad Dybcio @ 2025-10-10 18:26 UTC (permalink / raw)
To: Anna Maniscalco, Rob Clark, Sean Paul, Konrad Dybcio,
Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Marijn Suijten,
David Airlie, Simona Vetter
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On 10/10/25 7:49 PM, Anna Maniscalco wrote:
> When keepalive vote is set to false IFPC will be re-enabled even if the
> perfcounter oob vote is set.
>
> Workaround this by not setting keepalive vote when sysprof is active.
>
> ---
> I have little confidence that this is the proper solution hence why
> this is an RFC.
>
> Hopefully something better can be found.
>
> Signed-off-by: Anna Maniscalco <anna.maniscalco2000@gmail.com>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c b/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
> index afc5f4aa3b17334027f3c20072cc3f059a9733b7..975b91e2c439f659b7f716cff87f73d389641d91 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
> @@ -191,7 +191,8 @@ void a6xx_preempt_irq(struct msm_gpu *gpu)
>
> set_preempt_state(a6xx_gpu, PREEMPT_NONE);
>
> - a6xx_preempt_keepalive_vote(gpu, false);
> + if (refcount_read(&a6xx_gpu->base.base.sysprof_active) <= 0)
This returns an unsigned type, so you can just do:
if (!refcount_read(..))
Konrad
> + a6xx_preempt_keepalive_vote(gpu, false);
>
> trace_msm_gpu_preemption_irq(a6xx_gpu->cur_ring->id);
>
>
> ---
> base-commit: b5bad77e1e3c7249e4c0c88f98477e1ee7669b63
> change-id: 20251010-ifpc_counters_fix-8bd4470e6351
>
> Best regards,
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-10-10 18:27 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2025-10-10 17:49 [PATCH RFC] drm/msm: Workaround IFPC counters bug Anna Maniscalco
2025-10-10 18:24 ` Konrad Dybcio
2025-10-10 18:26 ` Konrad Dybcio
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