From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <jgg@nvidia.com>, <nicolinc@nvidia.com>
Cc: <linux-kernel@vger.kernel.org>, <robin.murphy@arm.com>,
<will@kernel.org>, <joro@8bytes.org>, <kevin.tian@intel.com>,
<jsnitsel@redhat.com>, <vasant.hegde@amd.com>,
<iommu@lists.linux.dev>, <santosh.shukla@amd.com>,
<sairaj.arunkodilkar@amd.com>, <jon.grimm@amd.com>,
<prashanthpra@google.com>, <wvw@google.com>, <wnliu@google.com>,
<gptran@google.com>, <kpsingh@google.com>,
<joao.m.martins@oracle.com>, <alejandro.j.jimenez@oracle.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v5 08/14] iommu/amd: Add support for nest parent domain allocation
Date: Wed, 12 Nov 2025 18:25:00 +0000 [thread overview]
Message-ID: <20251112182506.7165-9-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20251112182506.7165-1-suravee.suthikulpanit@amd.com>
To support nested translation, the nest parent domain is allocated with
IOMMU_HWPT_ALLOC_NEST_PARENT flag, and stores information of the v1 page
table for stage 2 (i.e. GPA->SPA).
Also, only support nest parent domain on AMD system, which can support
the Guest CR3 Table (GCR3TRPMode) feature. This feature is required in
order to program DTE[GCR3 Table Root Pointer] with the GPA.
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/iommu.c | 26 +++++++++++++++++++++++---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index a36426f096d2..e03aa8d946b3 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2727,6 +2727,14 @@ static struct iommu_domain *amd_iommu_domain_alloc_paging_v2(struct device *dev,
return &domain->domain;
}
+static inline bool is_nest_parent_supported(u32 flags)
+{
+ /* Only allow nest parent when these features are supported */
+ return check_feature(FEATURE_GT) &&
+ check_feature(FEATURE_GIOSUP) &&
+ check_feature2(FEATURE_GCR3TRPMODE);
+}
+
static struct iommu_domain *
amd_iommu_domain_alloc_paging_flags(struct device *dev, u32 flags,
const struct iommu_user_data *user_data)
@@ -2734,16 +2742,28 @@ amd_iommu_domain_alloc_paging_flags(struct device *dev, u32 flags,
{
struct amd_iommu *iommu = get_amd_iommu_from_dev(dev);
const u32 supported_flags = IOMMU_HWPT_ALLOC_DIRTY_TRACKING |
- IOMMU_HWPT_ALLOC_PASID;
+ IOMMU_HWPT_ALLOC_PASID |
+ IOMMU_HWPT_ALLOC_NEST_PARENT;
if ((flags & ~supported_flags) || user_data)
return ERR_PTR(-EOPNOTSUPP);
switch (flags & supported_flags) {
case IOMMU_HWPT_ALLOC_DIRTY_TRACKING:
- /* Allocate domain with v1 page table for dirty tracking */
- if (!amd_iommu_hd_support(iommu))
+ case IOMMU_HWPT_ALLOC_NEST_PARENT:
+ case IOMMU_HWPT_ALLOC_DIRTY_TRACKING | IOMMU_HWPT_ALLOC_NEST_PARENT:
+ /*
+ * Allocate domain with v1 page table for dirty tracking
+ * and/or Nest parent.
+ */
+ if ((flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING) &&
+ !amd_iommu_hd_support(iommu))
+ break;
+
+ if ((flags & IOMMU_HWPT_ALLOC_NEST_PARENT) &&
+ !is_nest_parent_supported(flags))
break;
+
return amd_iommu_domain_alloc_paging_v1(dev, flags);
case IOMMU_HWPT_ALLOC_PASID:
/* Allocate domain with v2 page table if IOMMU supports PASID. */
--
2.34.1
next prev parent reply other threads:[~2025-11-12 18:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-12 18:24 [PATCH v5 00/14] iommu/amd: Introduce Nested Translation support Suravee Suthikulpanit
2025-11-12 18:24 ` [PATCH v5 01/14] iommu/amd: Rename DEV_DOMID_MASK to DTE_DOMID_MASK Suravee Suthikulpanit
2025-11-12 18:24 ` [PATCH v5 02/14] iommu/amd: Make amd_iommu_pdom_id_alloc() non-static Suravee Suthikulpanit
2025-11-12 18:24 ` [PATCH v5 03/14] iommu/amd: Make amd_iommu_pdom_id_free() non-static Suravee Suthikulpanit
2025-11-12 18:24 ` [PATCH v5 04/14] iommu/amd: Make amd_iommu_make_clear_dte() non-static inline Suravee Suthikulpanit
2025-11-18 23:44 ` Jason Gunthorpe
2025-11-12 18:24 ` [PATCH v5 05/14] iommu/amd: Introduce helper function amd_iommu_update_dte() Suravee Suthikulpanit
2025-11-13 19:18 ` Nicolin Chen
2026-01-15 9:20 ` Suthikulpanit, Suravee
2025-11-18 23:50 ` Jason Gunthorpe
2025-11-12 18:24 ` [PATCH v5 06/14] iommufd: Introduce data struct for AMD nested domain allocation Suravee Suthikulpanit
2025-11-12 18:24 ` [PATCH v5 07/14] iommu/amd: Always enable GCR3TRPMode when supported Suravee Suthikulpanit
2025-11-13 19:19 ` Nicolin Chen
2025-11-12 18:25 ` Suravee Suthikulpanit [this message]
2025-11-12 18:25 ` [PATCH v5 09/14] iommu/amd: Introduce struct amd_iommu_viommu Suravee Suthikulpanit
2025-11-13 19:21 ` Nicolin Chen
2025-11-12 18:25 ` [PATCH v5 10/14] iommu/amd: Add support for nested domain allocation Suravee Suthikulpanit
2025-11-12 18:25 ` [PATCH v5 11/14] iommu/amd: Introduce gDomID-to-hDomID Mapping and handle parent domain invalidation Suravee Suthikulpanit
2025-11-13 20:36 ` Nicolin Chen
2025-11-19 0:02 ` Jason Gunthorpe
2026-01-15 9:25 ` Suthikulpanit, Suravee
2026-01-15 9:21 ` Suthikulpanit, Suravee
2025-11-19 0:11 ` Jason Gunthorpe
2025-11-19 1:10 ` Nicolin Chen
2025-11-12 18:25 ` [PATCH v5 12/14] iommu/amd: Refactor persistent DTE bits programming into amd_iommu_make_clear_dte() Suravee Suthikulpanit
2025-11-13 20:42 ` Nicolin Chen
2025-11-12 18:25 ` [PATCH v5 13/14] iommu/amd: Refactor logic to program the host page table in DTE Suravee Suthikulpanit
2025-11-13 21:19 ` Nicolin Chen
2025-11-13 21:29 ` Nicolin Chen
2025-11-19 0:21 ` Jason Gunthorpe
2025-11-19 0:20 ` Jason Gunthorpe
2026-01-15 9:24 ` Suthikulpanit, Suravee
2025-11-19 0:18 ` Jason Gunthorpe
2025-11-12 18:25 ` [PATCH v5 14/14] iommu/amd: Add support for nested domain attach/detach Suravee Suthikulpanit
2025-11-13 21:34 ` Nicolin Chen
2025-11-19 0:28 ` Jason Gunthorpe
2025-11-13 21:52 ` [PATCH v5 00/14] iommu/amd: Introduce Nested Translation support Nicolin Chen
2025-11-17 17:54 ` Jason Gunthorpe
2026-01-15 9:18 ` Suthikulpanit, Suravee
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