From: Avadhut Naik <avadhut.naik@amd.com>
To: <x86@kernel.org>
Cc: <bp@alien8.de>, <gregkh@linuxfoundation.org>,
<yazen.ghannam@amd.com>, <tony.luck@intel.com>,
<qiuxu.zhuo@intel.com>, <Smita.KoralahalliChannabasappa@amd.com>,
<linux-kernel@vger.kernel.org>, <avadhut.naik@amd.com>
Subject: [PATCH 0/2] Interrupt Storm support on AMD SMCA systems.
Date: Fri, 21 Nov 2025 19:04:03 +0000 [thread overview]
Message-ID: <20251121190542.2447913-1-avadhut.naik@amd.com> (raw)
This set adds support to handle threshold interrupt storms on AMD SMCA
systems.
The first patch fixes a bug which prevents subsequent errors after a CMCI
storm subsides from being logged.
The second patch adds support for interrupt storms on AMD SMCA systems.
Avadhut Naik (1):
x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA
systems
Smita Koralahalli (1):
x86/mce: Handle AMD threshold interrupt storms
arch/x86/kernel/cpu/mce/amd.c | 5 +++++
arch/x86/kernel/cpu/mce/internal.h | 2 ++
arch/x86/kernel/cpu/mce/threshold.c | 6 +++++-
3 files changed, 12 insertions(+), 1 deletion(-)
base-commit: c4ce736c24f6fca2b73845022e9e80e5b5bedc83
--
2.43.0
next reply other threads:[~2025-11-21 19:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-21 19:04 Avadhut Naik [this message]
2025-11-21 19:04 ` [PATCH 1/2] x86/mce: Do not clear bank's poll bit in mce_poll_banks " Avadhut Naik
2025-11-21 21:05 ` [tip: ras/core] " tip-bot2 for Avadhut Naik
2025-11-21 19:04 ` [PATCH 2/2] x86/mce: Handle AMD threshold interrupt storms Avadhut Naik
2025-11-21 21:05 ` [tip: ras/core] " tip-bot2 for Smita Koralahalli
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