From: Ruidong Tian <tianruidong@linux.alibaba.com>
To: catalin.marinas@arm.com, will@kernel.org, lpieralisi@kernel.org,
guohanjun@huawei.com, sudeep.holla@arm.com,
xueshuai@linux.alibaba.com, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
rafael@kernel.org, lenb@kernel.org, tony.luck@intel.com,
bp@alien8.de, yazen.ghannam@amd.com, misono.tomohiro@fujitsu.com
Cc: tianruidong@linux.alibaba.com
Subject: [PATCH v4 17/17] trace, ras: add ARM RAS extension trace event
Date: Mon, 22 Dec 2025 17:43:51 +0800 [thread overview]
Message-ID: <20251222094351.38792-19-tianruidong@linux.alibaba.com> (raw)
In-Reply-To: <20251222094351.38792-1-tianruidong@linux.alibaba.com>
Add a trace event for hardware errors reported by the ARMv8
RAS extension registers. userspace app can monitor this
trace event and decode error information.
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
---
drivers/ras/aest/aest-core.c | 6 +++
drivers/ras/ras.c | 3 ++
include/ras/ras_event.h | 71 ++++++++++++++++++++++++++++++++++++
3 files changed, 80 insertions(+)
diff --git a/drivers/ras/aest/aest-core.c b/drivers/ras/aest/aest-core.c
index 33e1f32c5892..9f06ac0b7c16 100644
--- a/drivers/ras/aest/aest-core.c
+++ b/drivers/ras/aest/aest-core.c
@@ -13,6 +13,8 @@
#include <linux/genalloc.h>
#include <linux/ras.h>
+#include <ras/ras_event.h>
+
#include "aest.h"
DEFINE_PER_CPU(struct aest_device, percpu_adev);
@@ -90,6 +92,10 @@ static void aest_print(struct aest_event *event)
pr_err("%s ERR%dMISC3: 0x%llx\n", pfx_seq, index,
regs->err_misc[3]);
}
+
+ trace_arm_ras_ext_event(event->type, event->id0, event->id1,
+ event->index, event->hid, &event->regs,
+ event->vendor_data, event->vendor_data_size);
}
static void aest_handle_memory_failure(u64 addr)
diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c
index 050b49466a18..3c0ba6c02d27 100644
--- a/drivers/ras/ras.c
+++ b/drivers/ras/ras.c
@@ -109,6 +109,9 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(extlog_mem_event);
EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event);
EXPORT_TRACEPOINT_SYMBOL_GPL(non_standard_event);
EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event);
+#ifdef CONFIG_ARM64_RAS_EXTN
+EXPORT_TRACEPOINT_SYMBOL_GPL(arm_ras_ext_event);
+#endif
static int __init parse_ras_param(char *str)
{
diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index eaecc3c5f772..3a4a0c0e4dbe 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -377,6 +377,77 @@ TRACE_EVENT(aer_event,
"Not available")
);
#endif /* CONFIG_PCIEAER */
+
+/*
+ * ARM RAS Extension Events Report
+ *
+ * This event is generated when an error reported by the ARM RAS extension
+ * hardware is detected.
+ */
+
+#ifdef CONFIG_ARM64_RAS_EXTN
+#include <asm/ras.h>
+TRACE_EVENT(arm_ras_ext_event,
+
+ TP_PROTO(const u8 type,
+ const u32 id0,
+ const u32 id1,
+ const u32 index,
+ char *hid,
+ struct ras_ext_regs *regs,
+ const u8 *data,
+ const u32 len),
+
+ TP_ARGS(type, id0, id1, index, hid, regs, data, len),
+
+ TP_STRUCT__entry(
+ __field(u8, type)
+ __field(u32, id0)
+ __field(u32, id1)
+ __field(u32, index)
+ __field(char *, hid)
+ __field(u64, err_fr)
+ __field(u64, err_ctlr)
+ __field(u64, err_status)
+ __field(u64, err_addr)
+ __field(u64, err_misc0)
+ __field(u64, err_misc1)
+ __field(u64, err_misc2)
+ __field(u64, err_misc3)
+ __field(u32, len)
+ __dynamic_array(u8, buf, len)
+ ),
+
+ TP_fast_assign(
+ __entry->type = type;
+ __entry->id0 = id0;
+ __entry->id1 = id1;
+ __entry->index = index;
+ __entry->hid = hid;
+ __entry->err_fr = regs->err_fr;
+ __entry->err_ctlr = regs->err_ctlr;
+ __entry->err_status = regs->err_status;
+ __entry->err_addr = regs->err_addr;
+ __entry->err_misc0 = regs->err_misc[0];
+ __entry->err_misc1 = regs->err_misc[1];
+ __entry->err_misc2 = regs->err_misc[2];
+ __entry->err_misc3 = regs->err_misc[3];
+ __entry->len = len;
+ memcpy(__get_dynamic_array(buf), data, len);
+ ),
+
+ TP_printk("type: %d; id0: %d; id1: %d; index: %d; hid: %s; "
+ "ERR_FR: %llx; ERR_CTLR: %llx; ERR_STATUS: %llx; "
+ "ERR_ADDR: %llx; ERR_MISC0: %llx; ERR_MISC1: %llx; "
+ "ERR_MISC2: %llx; ERR_MISC3: %llx; data len:%d; raw data:%s",
+ __entry->type, __entry->id0, __entry->id1, __entry->index,
+ __entry->hid, __entry->err_fr, __entry->err_ctlr,
+ __entry->err_status, __entry->err_addr, __entry->err_misc0,
+ __entry->err_misc1, __entry->err_misc2, __entry->err_misc3,
+ __entry->len,
+ __print_hex(__get_dynamic_array(buf), __entry->len))
+);
+#endif /* CONFIG_ARM64_RAS_EXTN */
#endif /* _TRACE_HW_EVENT_MC_H */
/* This part must be outside protection */
--
2.51.2.612.gdc70283dfc
prev parent reply other threads:[~2025-12-22 9:44 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 9:43 [PATCH v4 00/17] ARM Error Source Table V2 Support Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 01/17] ACPI/AEST: Parse the AEST table Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 02/17] ras: AEST: Add probe/remove for AEST driver Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 03/17] ras: AEST: support different group format Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 04/17] ras: AEST: Unify the read/write interface for system and MMIO register Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 05/17] ras: AEST: Probe RAS system architecture version Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 06/17] ras: AEST: Support RAS Common Fault Injection Model Extension Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 07/17] ras: AEST: Support CE threshold of error record Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 08/17] ras: AEST: Enable and register IRQs Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 09/17] ras: AEST: Add cpuhp callback Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 10/17] ras: AEST: Introduce AEST driver sysfs interface Ruidong Tian
2025-12-23 0:57 ` kernel test robot
2025-12-22 9:43 ` [PATCH v4 11/17] ras: AEST: Add error count tracking and debugfs interface Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 12/17] ras: AEST: Allow configuring CE threshold via debugfs Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 13/17] ras: AEST: Introduce AEST inject interface to test AEST driver Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 14/17] ras: ATL: Unified ATL interface for ARM64 and AMD Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 14/17] ras: ATL: Unify " Ruidong Tian
2025-12-22 23:34 ` kernel test robot
2025-12-25 6:58 ` kernel test robot
2025-12-22 9:43 ` [PATCH v4 15/17] ras: AEST: Add framework to process AEST vendor node Ruidong Tian
2025-12-22 9:43 ` [PATCH v4 16/17] ras: AEST: support vendor node CMN700 Ruidong Tian
2025-12-22 9:43 ` Ruidong Tian [this message]
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