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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, jian.hu@amlogic.com,
	jbrunet@baylibre.com,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH v1 3/3] clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro
Date: Mon,  5 Jan 2026 21:47:10 +0100	[thread overview]
Message-ID: <20260105204710.447779-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20260105204710.447779-1-martin.blumenstingl@googlemail.com>

There's no need to calculate HHI_HDMI_PLL_CNTL + 8 when we have a
HHI_HDMI_PLL_CNTL3 macro that has the correct offset already. No
functional changes, this makes it easier to compare the driver with the
datasheets.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/clk/meson/gxbb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 0788b9b1ed21..0900f4e44764 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -358,7 +358,7 @@ static const struct clk_div_table gxl_hdmi_pll_od_div_table[] = {
 
 static struct clk_regmap gxl_hdmi_pll_od = {
 	.data = &(struct clk_regmap_div_data){
-		.offset = HHI_HDMI_PLL_CNTL + 8,
+		.offset = HHI_HDMI_PLL_CNTL3,
 		.shift = 21,
 		.width = 2,
 		.table = gxl_hdmi_pll_od_div_table,
@@ -376,7 +376,7 @@ static struct clk_regmap gxl_hdmi_pll_od = {
 
 static struct clk_regmap gxl_hdmi_pll_od2 = {
 	.data = &(struct clk_regmap_div_data){
-		.offset = HHI_HDMI_PLL_CNTL + 8,
+		.offset = HHI_HDMI_PLL_CNTL3,
 		.shift = 23,
 		.width = 2,
 		.table = gxl_hdmi_pll_od_div_table,
@@ -394,7 +394,7 @@ static struct clk_regmap gxl_hdmi_pll_od2 = {
 
 static struct clk_regmap gxl_hdmi_pll = {
 	.data = &(struct clk_regmap_div_data){
-		.offset = HHI_HDMI_PLL_CNTL + 8,
+		.offset = HHI_HDMI_PLL_CNTL3,
 		.shift = 19,
 		.width = 2,
 		.table = gxl_hdmi_pll_od_div_table,
-- 
2.52.0


  parent reply	other threads:[~2026-01-05 20:47 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-05 20:47 [PATCH v1 0/3] clk: meson: small fixes for HDMI PLL OD Martin Blumenstingl
2026-01-05 20:47 ` [PATCH v1 1/3] clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs Martin Blumenstingl
2026-01-05 20:47 ` [PATCH v1 2/3] clk: meson: g12a: Limit the HDMI PLL OD to /4 Martin Blumenstingl
2026-01-05 20:47 ` Martin Blumenstingl [this message]
2026-01-06 10:25 ` [PATCH v1 0/3] clk: meson: small fixes for HDMI PLL OD Jerome Brunet
2026-01-06 12:10   ` Martin Blumenstingl
2026-01-06 14:18 ` Jerome Brunet

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