mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Laveesh Bansal <laveeshb@laveeshbansal.com>
To: Guenter Roeck <linux@roeck-us.net>
Cc: Jonathan Corbet <corbet@lwn.net>,
	linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Laveesh Bansal <laveeshb@laveeshbansal.com>
Subject: [PATCH 0/2] hwmon: (coretemp) Documentation and TjMax table updates
Date: Tue,  6 Jan 2026 15:54:24 +0000	[thread overview]
Message-ID: <20260106155426.547872-1-laveeshb@laveeshbansal.com> (raw)

This series updates the coretemp driver documentation and adds TjMax
fallback values for Intel Atom processors from Silvermont through
Tremont microarchitectures.

Note: These TjMax values are derived from Intel ARK and official
datasheets. The table entries serve as fallbacks when
MSR_IA32_TEMPERATURE_TARGET reads fail (e.g., in some virtualization
scenarios or locked BIOS configurations). This follows the existing
pattern for older Atoms (Bonnell, Saltwell) which also have fallback
entries despite supporting the MSR. I don't have physical access to
all processors listed — testing feedback welcome.

Patch 1 - Documentation update:
- Extend supported CPU model list with newer Atom processors
- Clarify that X86_FEATURE_DTHERM is the actual detection mechanism
- Update per-package temperature description for Sandy Bridge and newer
- Document that TjMax is read from MSR_IA32_TEMPERATURE_TARGET
- Add TjMax values for 22nm, 14nm, and 10nm Atoms to Appendix A

Patch 2 - Code change:
- Add TjMax fallback entries to tjmax_model_table[] for:
  - INTEL_ATOM_SILVERMONT (0x37): stepping 9 = 110C, other = 90C
  - INTEL_ATOM_SILVERMONT_MID (0x4a, Merrifield): 90C
  - INTEL_ATOM_SILVERMONT_MID2 (0x5a, Moorefield): 90C
  - INTEL_ATOM_AIRMONT (0x4c, Cherry Trail): 90C
  - INTEL_ATOM_GOLDMONT (0x5c, Apollo Lake): 105C
  - INTEL_ATOM_GOLDMONT_PLUS (0x7a, Gemini Lake): 105C
  - INTEL_ATOM_TREMONT (0x96, Elkhart Lake): 105C
  - INTEL_ATOM_TREMONT_L (0x9c, Jasper Lake): 105C

TjMax sources (Intel ARK and datasheets):
- Bay Trail E38xx (110C): https://ark.intel.com/content/www/us/en/ark/products/78475/intel-atom-processor-e3845.html
- Bay Trail Z37xx (90C): https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-z36xxx-z37xxx-datasheet-vol-1.pdf
- Cherry Trail (90C): https://ark.intel.com/content/www/us/en/ark/products/93361/intel-atom-x5-z8550-processor.html
- Apollo Lake (105C): https://ark.intel.com/content/www/us/en/ark/products/95598/intel-celeron-processor-j3455.html
- Gemini Lake (105C): https://ark.intel.com/content/www/us/en/ark/products/128989/intel-celeron-processor-j4105.html
- Elkhart Lake (105C): https://www.intel.com/content/www/us/en/products/sku/207907/intel-atom-x6425e-processor-1-5m-cache-up-to-3-00-ghz/specifications.html
- Jasper Lake (105C): https://www.intel.com/content/www/us/en/products/sku/212330/intel-celeron-processor-n5100-4m-cache-up-to-2-80-ghz/specifications.html
- Bay Trail stepping: https://community.intel.com/cipcp26785/attachments/cipcp26785/embedded-atom-processors/4708/1/600834-329901-intel-atom-processor-e3800-product-family-su-rev015.pdf

Laveesh Bansal (2):
  Documentation: hwmon: coretemp: Update supported CPUs and TjMax values
  hwmon: (coretemp) Add TjMax for Silvermont through Tremont Atoms

 Documentation/hwmon/coretemp.rst | 56 ++++++++++++++++++++++++++------
 drivers/hwmon/coretemp.c         |  9 +++++
 2 files changed, 55 insertions(+), 10 deletions(-)

--
2.43.0


             reply	other threads:[~2026-01-06 15:54 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-06 15:54 Laveesh Bansal [this message]
2026-01-06 15:54 ` [PATCH 1/2] Documentation: hwmon: coretemp: Update supported CPUs and TjMax values Laveesh Bansal
2026-01-13  0:01   ` Guenter Roeck
2026-01-06 15:54 ` [PATCH 2/2] hwmon: (coretemp) Add TjMax for Silvermont through Tremont Atoms Laveesh Bansal
2026-01-13  0:02   ` Guenter Roeck

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260106155426.547872-1-laveeshb@laveeshbansal.com \
    --to=laveeshb@laveeshbansal.com \
    --cc=corbet@lwn.net \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-hwmon@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@roeck-us.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®