From: Andrew Morton <akpm@linux-foundation.org>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Marco Elver <elver@google.com>,
Alexander Potapenko <glider@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Jann Horn <jannh@google.com>,
kasan-dev@googlegroups.com
Subject: Re: [PATCH] x86/kfence: Avoid writing L1TF-vulnerable PTEs
Date: Wed, 7 Jan 2026 15:17:00 -0800 [thread overview]
Message-ID: <20260107151700.c7b9051929548391e92cfb3e@linux-foundation.org> (raw)
In-Reply-To: <20260106180426.710013-1-andrew.cooper3@citrix.com>
On Tue, 6 Jan 2026 18:04:26 +0000 Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> For native, the choice of PTE is fine. There's real memory backing the
> non-present PTE. However, for XenPV, Xen complains:
>
> (XEN) d1 L1TF-vulnerable L1e 8010000018200066 - Shadowing
>
> To explain, some background on XenPV pagetables:
>
> Xen PV guests are control their own pagetables; they choose the new PTE
> value, and use hypercalls to make changes so Xen can audit for safety.
>
> In addition to a regular reference count, Xen also maintains a type
> reference count. e.g. SegDesc (referenced by vGDT/vLDT),
> Writable (referenced with _PAGE_RW) or L{1..4} (referenced by vCR3 or a
> lower pagetable level). This is in order to prevent e.g. a page being
> inserted into the pagetables for which the guest has a writable mapping.
>
> For non-present mappings, all other bits become software accessible, and
> typically contain metadata rather a real frame address. There is nothing
> that a reference count could sensibly be tied to. As such, even if Xen
> could recognise the address as currently safe, nothing would prevent that
> frame from changing owner to another VM in the future.
>
> When Xen detects a PV guest writing a L1TF-PTE, it responds by activating
> shadow paging. This is normally only used for the live phase of
> migration, and comes with a reasonable overhead.
>
> KFENCE only cares about getting #PF to catch wild accesses; it doesn't care
> about the value for non-present mappings. Use a fully inverted PTE, to
> avoid hitting the slow path when running under Xen.
>
> While adjusting the logic, take the opportunity to skip all actions if the
> PTE is already in the right state, half the number PVOps callouts, and skip
> TLB maintenance on a !P -> P transition which benefits non-Xen cases too.
>
> Fixes: 1dc0da6e9ec0 ("x86, kfence: enable KFENCE for x86")
Seems that I sent 1dc0da6e9ec0 upstream so thanks, I'll grab this. If
an x86 person chooses to handle it then I'll drop the mm.git version.
I'll add a cc:stable to the mm.git copy, just to be sure.
> Tested-by: Marco Elver <elver@google.com>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
That "^---$" tells tooling "changelog stops here".
> CC: Alexander Potapenko <glider@google.com>
> CC: Marco Elver <elver@google.com>
> CC: Dmitry Vyukov <dvyukov@google.com>
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: Borislav Petkov <bp@alien8.de>
> CC: Dave Hansen <dave.hansen@linux.intel.com>
> CC: x86@kernel.org
> CC: "H. Peter Anvin" <hpa@zytor.com>
> CC: Andrew Morton <akpm@linux-foundation.org>
> CC: Jann Horn <jannh@google.com>
> CC: kasan-dev@googlegroups.com
> CC: linux-kernel@vger.kernel.org
>
> v1:
> * First public posting. This went to security@ first just in case, and
> then I got districted with other things ahead of public posting.
> ---
That "^---$" would be better placed above the versioning info.
>
> ...
>
next prev parent reply other threads:[~2026-01-07 23:17 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-06 18:04 Andrew Cooper
2026-01-07 11:31 ` Alexander Potapenko
2026-01-07 12:01 ` Andrew Cooper
2026-01-07 23:17 ` Andrew Morton [this message]
2026-01-26 19:07 ` [REGRESSION] x86_32 boot hang in 6.19-rc7 caused by b505f1944535 ("x86/kfence: avoid writing L1TF-vulnerable PTEs") Ryusuke Konishi
2026-01-26 19:39 ` Andrew Cooper
2026-01-26 19:52 ` Ryusuke Konishi
2026-01-26 19:54 ` Borislav Petkov
2026-01-26 20:22 ` Andrew Cooper
2026-01-26 20:41 ` Ryusuke Konishi
2026-01-26 20:43 ` Andrew Cooper
2026-01-26 20:25 ` Dave Hansen
2026-01-26 20:24 ` Andrew Morton
2026-01-26 20:36 ` Dave Hansen
2026-01-26 21:06 ` [PATCH] x86/kfence: Fix booting on 32bit non-PAE systems Andrew Cooper
2026-01-26 21:08 ` Andrew Cooper
2026-01-26 21:10 ` [PATCH v2] " Andrew Cooper
2026-01-26 21:24 ` Andrew Morton
2026-01-26 21:56 ` Borislav Petkov
2026-01-26 22:01 ` Andrew Cooper
2026-01-26 22:09 ` Borislav Petkov
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