* [PATCH v4 0/3] Add support for Cix Sky1 resets
@ 2026-01-28 9:36 Gary Yang
2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Gary Yang @ 2026-01-28 9:36 UTC (permalink / raw)
To: lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen
Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream,
Gary Yang
Patch 1: Add yaml file for Cix Sky1 resets
Patch 2: Add driver codes for Cix Sky1 resets
Patch 3: Add dts nodes for Cix Sky1 resets
v4 changes:
- Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-rst.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-orion-o6.dtb
- add syscon
- refine reset driver
- fix dt-bindings style
v3 changes:
- Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-rst.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-orion-o6.dtb
- remove syscon
v2 changes:
- Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-rst.yaml
scripts/checkpatch.pl 000*.patch
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-orion-o6.dtb
- fix dt-bindings style
- refine reset driver
Gary Yang (3):
dt-bindings: reset: add sky1 reset controller
reset: cix: add support for cix sky1 resets
arm64: dts: cix: add support for cix sky1 resets
.../devicetree/bindings/mfd/syscon.yaml | 7 +
.../bindings/reset/cix,sky1-rst.yaml | 46 +++
.../soc/cix/cix,sky1-system-controller.yaml | 48 +++
arch/arm64/boot/dts/cix/sky1.dtsi | 22 +
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-sky1.c | 376 ++++++++++++++++++
include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 ++
include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++
9 files changed, 713 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml
create mode 100644 Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml
create mode 100644 drivers/reset/reset-sky1.c
create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h
create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h
--
2.49.0
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 9:36 [PATCH v4 0/3] Add support for Cix Sky1 resets Gary Yang @ 2026-01-28 9:36 ` Gary Yang 2026-01-28 10:01 ` Krzysztof Kozlowski 2026-01-28 11:22 ` Rob Herring (Arm) 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang 2026-01-28 9:36 ` [PATCH v4 3/3] arm64: dts: " Gary Yang 2 siblings, 2 replies; 13+ messages in thread From: Gary Yang @ 2026-01-28 9:36 UTC (permalink / raw) To: lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream, Gary Yang There are two reset controllers on Cix sky1 Soc. One is located in S0 domain, and the other is located in S0 and S5 domain. Signed-off-by: Gary Yang <gary.yang@cixtech.com> Link: https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.com Signed-off-by: Peter Chen <peter.chen@cixtech.com> --- .../devicetree/bindings/mfd/syscon.yaml | 7 + .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++++++++++++ 5 files changed, 307 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml create mode 100644 Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 55efb83b1495..be864a6b8efb 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -170,6 +170,8 @@ properties: - cirrus,ep7209-syscon1 - cirrus,ep7209-syscon2 - cirrus,ep7209-syscon3 + - cix,sky1-system-controller + - cix,sky1-s5-system-controller - cnxt,cx92755-uc - freecom,fsg-cs2-system-controller - fsl,imx93-aonmix-ns-syscfg @@ -254,6 +256,11 @@ properties: - const: microchip,pic64gx-sysreg-scb - const: microchip,mpfs-sysreg-scb - const: syscon + - items: + - enum: + - cix,sky1-system-controller + - cix,sky1-s5-system-controller + - const: syscon reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml new file mode 100644 index 000000000000..4323acdc2c45 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/cix,sky1-rst.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CIX Sky1 Reset Controller + +maintainers: + - Gary Yang <gary.yang@cixtech.com> + +description: | + CIX Sky1 reset controller can be used to reset various set of peripherals. + There are two reset controllers, one is located in S0 domain, the other + is located in S0 and S5 domain. + + See also: + - include/dt-bindings/reset/cix,sky1-rst.h + +properties: + compatible: + items: + - enum: + - cix,sky1-rst + - cix,sky1-rst-fch + + '#reset-cells': + const: 1 + +required: + - compatible + - '#reset-cells' + +additionalProperties: false + +examples: + - | + syscon@16000000 { + compatible = "cix,sky1-s5-system-controller", "syscon", + "simple-mfd"; + reg = <0x0 0x16000000 0x0 0x1000>; + src: reset-controller { + compatible = "cix,sky1-rst"; + #reset-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml new file mode 100644 index 000000000000..f6e2776e3f53 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/cix/cix,sky1-system-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cix Sky1 SoC system controller register region + +maintainers: + - Gary Yang <gary.yang@cixtech.com> + +description: + An wide assortment of registers of the system controller on Sky1 SoC, + including resets and usb. + +allOf: + - $ref: /schemas/mfd/syscon.yaml# + +properties: + compatible: + oneOf: + - contains: + - enum: + - cix,sky1-system-controller + - cix,sky1-s5-system-controller + - const: syscon + - const: simple-mfd + + reg: + maxItems: 2 + +patternProperties: + "^reset(-controller)?$": + $ref: /schemas/reset/cix,sky1-rst.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@16000000 { + compatible = "cix,sky1-s5-system-controller", "syscon", "simple-mfd"; + reg = <0x0 0x16000000 0x0 0x1000>; + }; + diff --git a/include/dt-bindings/reset/cix,sky1-rst-fch.h b/include/dt-bindings/reset/cix,sky1-rst-fch.h new file mode 100644 index 000000000000..8e67d7eb92aa --- /dev/null +++ b/include/dt-bindings/reset/cix,sky1-rst-fch.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* Author: Jerry Zhu <jerry.zhu@cixtech.com> */ +#ifndef DT_BINDING_RESET_FCH_SKY1_H +#define DT_BINDING_RESET_FCH_SKY1_H + +/* func reset for sky1 fch */ + +#define SW_I3C0_RST_FUNC_G_N 0 +#define SW_I3C0_RST_FUNC_I_N 1 +#define SW_I3C1_RST_FUNC_G_N 2 +#define SW_I3C1_RST_FUNC_I_N 3 +#define SW_UART0_RST_FUNC_N 4 +#define SW_UART1_RST_FUNC_N 5 +#define SW_UART2_RST_FUNC_N 6 +#define SW_UART3_RST_FUNC_N 7 +#define SW_TIMER_RST_FUNC_N 8 + +/* apb reset for sky1 fch */ +#define SW_I3C0_RST_APB_N 9 +#define SW_I3C1_RST_APB_N 10 +#define SW_DMA_RST_AXI_N 11 +#define SW_UART0_RST_APB_N 12 +#define SW_UART1_RST_APB_N 13 +#define SW_UART2_RST_APB_N 14 +#define SW_UART3_RST_APB_N 15 +#define SW_SPI0_RST_APB_N 16 +#define SW_SPI1_RST_APB_N 17 +#define SW_I2C0_RST_APB_N 18 +#define SW_I2C1_RST_APB_N 19 +#define SW_I2C2_RST_APB_N 20 +#define SW_I2C3_RST_APB_N 21 +#define SW_I2C4_RST_APB_N 22 +#define SW_I2C5_RST_APB_N 23 +#define SW_I2C6_RST_APB_N 24 +#define SW_I2C7_RST_APB_N 25 +#define SW_GPIO_RST_APB_N 26 + +/* fch rst for xspi */ +#define SW_XSPI_REG_RST_N 27 +#define SW_XSPI_SYS_RST_N 28 + +#endif diff --git a/include/dt-bindings/reset/cix,sky1-rst.h b/include/dt-bindings/reset/cix,sky1-rst.h new file mode 100644 index 000000000000..2f0990922aad --- /dev/null +++ b/include/dt-bindings/reset/cix,sky1-rst.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* Author: Jerry Zhu <jerry.zhu@cixtech.com> */ +#ifndef DT_BINDING_RESET_SKY1_H +#define DT_BINDING_RESET_SKY1_H + +/* reset for csu_pm */ + +#define SKY1_CSU_PM_RESET_N 0 +#define SKY1_SENSORFUSION_RESET_N 1 +#define SKY1_SENSORFUSION_NOC_RESET_N 2 + +/* reset group0 for s0 domain modules */ +#define SKY1_DDRC_RESET_N 3 +#define SKY1_GIC_RESET_N 4 +#define SKY1_CI700_RESET_N 5 +#define SKY1_SYS_NI700_RESET_N 6 +#define SKY1_MM_NI700_RESET_N 7 +#define SKY1_PCIE_NI700_RESET_N 8 +#define SKY1_GPU_RESET_N 9 +#define SKY1_NPUTOP_RESET_N 10 +#define SKY1_NPUCORE0_RESET_N 11 +#define SKY1_NPUCORE1_RESET_N 12 +#define SKY1_NPUCORE2_RESET_N 13 +#define SKY1_VPU_RESET_N 14 +#define SKY1_ISP_SRESET_N 15 +#define SKY1_ISP_ARESET_N 16 +#define SKY1_ISP_HRESET_N 17 +#define SKY1_ISP_GDCRESET_N 18 +#define SKY1_DPU_RESET0_N 19 +#define SKY1_DPU_RESET1_N 20 +#define SKY1_DPU_RESET2_N 21 +#define SKY1_DPU_RESET3_N 22 +#define SKY1_DPU_RESET4_N 23 +#define SKY1_DP_RESET0_N 24 +#define SKY1_DP_RESET1_N 25 +#define SKY1_DP_RESET2_N 26 +#define SKY1_DP_RESET3_N 27 +#define SKY1_DP_RESET4_N 28 +#define SKY1_DP_PHY_RST_N 29 + +/* reset group1 for s0 domain modules */ +#define SKY1_AUDIO_HIFI5_RESET_N 30 +#define SKY1_AUDIO_HIFI5_NOC_RESET_N 31 +#define SKY1_CSIDPHY_PRST0_N 32 +#define SKY1_CSIDPHY_CMNRST0_N 33 +#define SKY1_CSI0_RST_N 34 +#define SKY1_CSIDPHY_PRST1_N 35 +#define SKY1_CSIDPHY_CMNRST1_N 36 +#define SKY1_CSI1_RST_N 37 +#define SKY1_CSI2_RST_N 38 +#define SKY1_CSI3_RST_N 39 +#define SKY1_CSIBRDGE0_RST_N 40 +#define SKY1_CSIBRDGE1_RST_N 41 +#define SKY1_CSIBRDGE2_RST_N 42 +#define SKY1_CSIBRDGE3_RST_N 43 +#define SKY1_GMAC0_RST_N 44 +#define SKY1_GMAC1_RST_N 45 +#define SKY1_PCIE0_RESET_N 46 +#define SKY1_PCIE1_RESET_N 47 +#define SKY1_PCIE2_RESET_N 48 +#define SKY1_PCIE3_RESET_N 49 +#define SKY1_PCIE4_RESET_N 50 + +/* reset group1 for usb phys */ +#define SKY1_USB_DP_PHY0_PRST_N 51 +#define SKY1_USB_DP_PHY1_PRST_N 52 +#define SKY1_USB_DP_PHY2_PRST_N 53 +#define SKY1_USB_DP_PHY3_PRST_N 54 +#define SKY1_USB_DP_PHY0_RST_N 55 +#define SKY1_USB_DP_PHY1_RST_N 56 +#define SKY1_USB_DP_PHY2_RST_N 57 +#define SKY1_USB_DP_PHY3_RST_N 58 +#define SKY1_USBPHY_SS_PST_N 59 +#define SKY1_USBPHY_SS_RST_N 60 +#define SKY1_USBPHY_HS0_PRST_N 61 +#define SKY1_USBPHY_HS1_PRST_N 62 +#define SKY1_USBPHY_HS2_PRST_N 63 +#define SKY1_USBPHY_HS3_PRST_N 64 +#define SKY1_USBPHY_HS4_PRST_N 65 +#define SKY1_USBPHY_HS5_PRST_N 66 +#define SKY1_USBPHY_HS6_PRST_N 67 +#define SKY1_USBPHY_HS7_PRST_N 68 +#define SKY1_USBPHY_HS8_PRST_N 69 +#define SKY1_USBPHY_HS9_PRST_N 70 + +/* reset group1 for usb controllers */ +#define SKY1_USBC_SS0_PRST_N 71 +#define SKY1_USBC_SS1_PRST_N 72 +#define SKY1_USBC_SS2_PRST_N 73 +#define SKY1_USBC_SS3_PRST_N 74 +#define SKY1_USBC_SS4_PRST_N 75 +#define SKY1_USBC_SS5_PRST_N 76 +#define SKY1_USBC_SS0_RST_N 77 +#define SKY1_USBC_SS1_RST_N 78 +#define SKY1_USBC_SS2_RST_N 79 +#define SKY1_USBC_SS3_RST_N 80 +#define SKY1_USBC_SS4_RST_N 81 +#define SKY1_USBC_SS5_RST_N 82 +#define SKY1_USBC_HS0_PRST_N 83 +#define SKY1_USBC_HS1_PRST_N 84 +#define SKY1_USBC_HS2_PRST_N 85 +#define SKY1_USBC_HS3_PRST_N 86 +#define SKY1_USBC_HS0_RST_N 87 +#define SKY1_USBC_HS1_RST_N 88 +#define SKY1_USBC_HS2_RST_N 89 +#define SKY1_USBC_HS3_RST_N 90 + +/* reset group0 for rcsu */ +#define SKY1_AUDIO_RCSU_RESET_N 91 +#define SKY1_CI700_RCSU_RESET_N 92 +#define SKY1_CSI_RCSU0_RESET_N 93 +#define SKY1_CSI_RCSU1_RESET_N 94 +#define SKY1_CSU_PM_RCSU_RESET_N 95 +#define SKY1_DDR_BROADCAST_RCSU_RESET_N 96 +#define SKY1_DDR_CTRL_RCSU_0_RESET_N 97 +#define SKY1_DDR_CTRL_RCSU_1_RESET_N 98 +#define SKY1_DDR_CTRL_RCSU_2_RESET_N 99 +#define SKY1_DDR_CTRL_RCSU_3_RESET_N 100 +#define SKY1_DDR_TZC400_RCSU_0_RESET_N 101 +#define SKY1_DDR_TZC400_RCSU_1_RESET_N 102 +#define SKY1_DDR_TZC400_RCSU_2_RESET_N 103 +#define SKY1_DDR_TZC400_RCSU_3_RESET_N 104 +#define SKY1_DP0_RCSU_RESET_N 105 +#define SKY1_DP1_RCSU_RESET_N 106 +#define SKY1_DP2_RCSU_RESET_N 107 +#define SKY1_DP3_RCSU_RESET_N 108 +#define SKY1_DP4_RCSU_RESET_N 109 +#define SKY1_DPU0_RCSU_RESET_N 110 +#define SKY1_DPU1_RCSU_RESET_N 111 +#define SKY1_DPU2_RCSU_RESET_N 112 +#define SKY1_DPU3_RCSU_RESET_N 113 +#define SKY1_DPU4_RCSU_RESET_N 114 +#define SKY1_DSU_RCSU_RESET_N 115 +#define SKY1_FCH_RCSU_RESET_N 116 +#define SKY1_GICD_RCSU_RESET_N 117 +#define SKY1_GMAC_RCSU_RESET_N 118 +#define SKY1_GPU_RCSU_RESET_N 119 +#define SKY1_ISP_RCSU0_RESET_N 120 +#define SKY1_ISP_RCSU1_RESET_N 121 +#define SKY1_NI700_MMHUB_RCSU_RESET_N 122 + +/* reset group1 for rcsu */ +#define SKY1_NPU_RCSU_RESET_N 123 +#define SKY1_NI700_PCIE_RCSU_RESET_N 124 +#define SKY1_PCIE_X421_RCSU_RESET_N 125 +#define SKY1_PCIE_X8_RCSU_RESET_N 126 +#define SKY1_SF_RCSU_RESET_N 127 +#define SKY1_RCSU_SMMU_MMHUB_RESET_N 128 +#define SKY1_RCSU_SMMU_PCIEHUB_RESET_N 129 +#define SKY1_RCSU_SYSHUB_RESET_N 130 +#define SKY1_NI700_SMN_RCSU_RESET_N 131 +#define SKY1_NI700_SYSHUB_RCSU_RESET_N 132 +#define SKY1_RCSU_USB2_HOST0_RESET_N 133 +#define SKY1_RCSU_USB2_HOST1_RESET_N 134 +#define SKY1_RCSU_USB2_HOST2_RESET_N 135 +#define SKY1_RCSU_USB2_HOST3_RESET_N 136 +#define SKY1_RCSU_USB3_TYPEA_DRD_RESET_N 137 +#define SKY1_RCSU_USB3_TYPEC_DRD_RESET_N 138 +#define SKY1_RCSU_USB3_TYPEC_HOST0_RESET_N 139 +#define SKY1_RCSU_USB3_TYPEC_HOST1_RESET_N 140 +#define SKY1_RCSU_USB3_TYPEC_HOST2_RESET_N 141 +#define SKY1_VPU_RCSU_RESET_N 142 + +#endif -- 2.49.0 ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang @ 2026-01-28 10:01 ` Krzysztof Kozlowski 2026-01-28 10:14 ` Conor Dooley 2026-01-29 1:58 ` 回复: " Gary Yang 2026-01-28 11:22 ` Rob Herring (Arm) 1 sibling, 2 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2026-01-28 10:01 UTC (permalink / raw) To: Gary Yang, lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream On 28/01/2026 10:36, Gary Yang wrote: > There are two reset controllers on Cix sky1 Soc. > One is located in S0 domain, and the other is located > in S0 and S5 domain. Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit): https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > Link: https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.com > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > --- > .../devicetree/bindings/mfd/syscon.yaml | 7 + > .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ > .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++++++++++++ > 5 files changed, 307 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > create mode 100644 Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > index 55efb83b1495..be864a6b8efb 100644 > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > @@ -170,6 +170,8 @@ properties: > - cirrus,ep7209-syscon1 > - cirrus,ep7209-syscon2 > - cirrus,ep7209-syscon3 > + - cix,sky1-system-controller > + - cix,sky1-s5-system-controller > - cnxt,cx92755-uc > - freecom,fsg-cs2-system-controller > - fsl,imx93-aonmix-ns-syscfg > @@ -254,6 +256,11 @@ properties: > - const: microchip,pic64gx-sysreg-scb > - const: microchip,mpfs-sysreg-scb > - const: syscon > + - items: > + - enum: > + - cix,sky1-system-controller > + - cix,sky1-s5-system-controller > + - const: syscon Do not create your own style. Cix is not special. There is already an enum for EVERYONE. > > reg: > maxItems: 1 Independent patch. Please do not combine unrelated patches into one. > diff --git a/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > new file mode 100644 > index 000000000000..4323acdc2c45 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > @@ -0,0 +1,46 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/cix,sky1-rst.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: CIX Sky1 Reset Controller > + > +maintainers: > + - Gary Yang <gary.yang@cixtech.com> > + > +description: | > + CIX Sky1 reset controller can be used to reset various set of peripherals. > + There are two reset controllers, one is located in S0 domain, the other > + is located in S0 and S5 domain. > + > + See also: > + - include/dt-bindings/reset/cix,sky1-rst.h > + > +properties: > + compatible: > + items: > + - enum: > + - cix,sky1-rst > + - cix,sky1-rst-fch > + > + '#reset-cells': > + const: 1 No resources? Then not a dedicated child node, but part of the syscon. Fold this entire binding into the parent node. > + > +required: > + - compatible > + - '#reset-cells' > + > +additionalProperties: false > + > +examples: > + - | > + syscon@16000000 { > + compatible = "cix,sky1-s5-system-controller", "syscon", > + "simple-mfd"; Mess alignment. > + reg = <0x0 0x16000000 0x0 0x1000>; Does not belong here. > + src: reset-controller { > + compatible = "cix,sky1-rst"; > + #reset-cells = <1>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > new file mode 100644 > index 000000000000..f6e2776e3f53 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/cix/cix,sky1-system-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Cix Sky1 SoC system controller register region > + > +maintainers: > + - Gary Yang <gary.yang@cixtech.com> > + > +description: > + An wide assortment of registers of the system controller on Sky1 SoC, > + including resets and usb. > + > +allOf: > + - $ref: /schemas/mfd/syscon.yaml# > + > +properties: > + compatible: > + oneOf: > + - contains: What? No, don't come with random code. There is no single code like this. > + - enum: > + - cix,sky1-system-controller > + - cix,sky1-s5-system-controller > + - const: syscon > + - const: simple-mfd Huh? You already documented this. NAK, you are making random changes without any concept. Read previous feedback. Really carefully. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 10:01 ` Krzysztof Kozlowski @ 2026-01-28 10:14 ` Conor Dooley 2026-01-29 1:58 ` 回复: " Gary Yang 1 sibling, 0 replies; 13+ messages in thread From: Conor Dooley @ 2026-01-28 10:14 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Gary Yang, lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen, devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream [-- Attachment #1: Type: text/plain, Size: 6439 bytes --] On Wed, Jan 28, 2026 at 11:01:40AM +0100, Krzysztof Kozlowski wrote: > On 28/01/2026 10:36, Gary Yang wrote: > > There are two reset controllers on Cix sky1 Soc. > > One is located in S0 domain, and the other is located > > in S0 and S5 domain. > > Please wrap commit message according to Linux coding style / submission > process (neither too early nor over the limit): > https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > > > > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > > Link: https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.com > > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > > --- > > .../devicetree/bindings/mfd/syscon.yaml | 7 + > > .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ > > .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ > > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > > include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++++++++++++ > > 5 files changed, 307 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > create mode 100644 Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > > create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > > > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > > index 55efb83b1495..be864a6b8efb 100644 > > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > > @@ -170,6 +170,8 @@ properties: > > - cirrus,ep7209-syscon1 > > - cirrus,ep7209-syscon2 > > - cirrus,ep7209-syscon3 > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > - cnxt,cx92755-uc > > - freecom,fsg-cs2-system-controller > > - fsl,imx93-aonmix-ns-syscfg > > @@ -254,6 +256,11 @@ properties: > > - const: microchip,pic64gx-sysreg-scb > > - const: microchip,mpfs-sysreg-scb > > - const: syscon > > + - items: > > + - enum: > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > + - const: syscon > > Do not create your own style. Cix is not special. There is already an > enum for EVERYONE. > > > > > reg: > > maxItems: 1 > > Independent patch. Please do not combine unrelated patches into one. Was mid reply when I saw this mail come through, just wanted to add the one thing I had to say in excess of what you've written: All the changes to syscon.yaml should be deleted, as it adds a competing definition to the one in the dedicated file, and I am surprised something like this passed testing.. Perhaps it passes if DT_SCHEMA_FILES=syscon.yaml but it'd fail a real dtbs_check, right? At v4, I'd be hoping for more thorough testing to be done. Cheers, Conor. > > > > diff --git a/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > new file mode 100644 > > index 000000000000..4323acdc2c45 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > @@ -0,0 +1,46 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/cix,sky1-rst.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: CIX Sky1 Reset Controller > > + > > +maintainers: > > + - Gary Yang <gary.yang@cixtech.com> > > + > > +description: | > > + CIX Sky1 reset controller can be used to reset various set of peripherals. > > + There are two reset controllers, one is located in S0 domain, the other > > + is located in S0 and S5 domain. > > + > > + See also: > > + - include/dt-bindings/reset/cix,sky1-rst.h > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - cix,sky1-rst > > + - cix,sky1-rst-fch > > + > > + '#reset-cells': > > + const: 1 > > No resources? Then not a dedicated child node, but part of the syscon. > Fold this entire binding into the parent node. > > > + > > +required: > > + - compatible > > + - '#reset-cells' > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + syscon@16000000 { > > + compatible = "cix,sky1-s5-system-controller", "syscon", > > + "simple-mfd"; > > Mess alignment. > > > + reg = <0x0 0x16000000 0x0 0x1000>; > > Does not belong here. > > > + src: reset-controller { > > + compatible = "cix,sky1-rst"; > > + #reset-cells = <1>; > > + }; > > > + }; > > diff --git a/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > > new file mode 100644 > > index 000000000000..f6e2776e3f53 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > > @@ -0,0 +1,48 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/soc/cix/cix,sky1-system-controller.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Cix Sky1 SoC system controller register region > > + > > +maintainers: > > + - Gary Yang <gary.yang@cixtech.com> > > + > > +description: > > + An wide assortment of registers of the system controller on Sky1 SoC, > > + including resets and usb. > > + > > +allOf: > > + - $ref: /schemas/mfd/syscon.yaml# > > + > > +properties: > > + compatible: > > + oneOf: > > + - contains: > > What? No, don't come with random code. There is no single code like this. > > > + - enum: > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > + - const: syscon > > + - const: simple-mfd > > Huh? You already documented this. > > NAK, you are making random changes without any concept. > > Read previous feedback. Really carefully. > > Best regards, > Krzysztof [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 13+ messages in thread
* 回复: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 10:01 ` Krzysztof Kozlowski 2026-01-28 10:14 ` Conor Dooley @ 2026-01-29 1:58 ` Gary Yang 1 sibling, 0 replies; 13+ messages in thread From: Gary Yang @ 2026-01-29 1:58 UTC (permalink / raw) To: Krzysztof Kozlowski, lee, robh, krzk+dt, conor+dt, p.zabel, Peter Chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream Hi Krzysztof: I'm glad to see your comments. > EXTERNAL EMAIL > > On 28/01/2026 10:36, Gary Yang wrote: > > There are two reset controllers on Cix sky1 Soc. > > One is located in S0 domain, and the other is located in S0 and S5 > > domain. > > Please wrap commit message according to Linux coding style / submission > process (neither too early nor over the limit): > https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/subm > itting-patches.rst#L597 > Yes, we will fix it > > > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > > Link: > > https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.co > > m > > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > > --- > > .../devicetree/bindings/mfd/syscon.yaml | 7 + > > .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ > > .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ > > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > > include/dt-bindings/reset/cix,sky1-rst.h | 164 > ++++++++++++++++++ > > 5 files changed, 307 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > create mode 100644 > > Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.y > > aml create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > > > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml > > b/Documentation/devicetree/bindings/mfd/syscon.yaml > > index 55efb83b1495..be864a6b8efb 100644 > > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > > @@ -170,6 +170,8 @@ properties: > > - cirrus,ep7209-syscon1 > > - cirrus,ep7209-syscon2 > > - cirrus,ep7209-syscon3 > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > - cnxt,cx92755-uc > > - freecom,fsg-cs2-system-controller > > - fsl,imx93-aonmix-ns-syscfg @@ -254,6 +256,11 @@ > > properties: > > - const: microchip,pic64gx-sysreg-scb > > - const: microchip,mpfs-sysreg-scb > > - const: syscon > > + - items: > > + - enum: > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > + - const: syscon > > Do not create your own style. Cix is not special. There is already an enum for > EVERYONE. > > > > > reg: > > maxItems: 1 > > Independent patch. Please do not combine unrelated patches into one. > We will delete all changes as Conor's suggestions > > > diff --git a/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > new file mode 100644 > > index 000000000000..4323acdc2c45 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > @@ -0,0 +1,46 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/cix,sky1-rst.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: CIX Sky1 Reset Controller > > + > > +maintainers: > > + - Gary Yang <gary.yang@cixtech.com> > > + > > +description: | > > + CIX Sky1 reset controller can be used to reset various set of peripherals. > > + There are two reset controllers, one is located in S0 domain, the > > +other > > + is located in S0 and S5 domain. > > + > > + See also: > > + - include/dt-bindings/reset/cix,sky1-rst.h > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - cix,sky1-rst > > + - cix,sky1-rst-fch > > + > > + '#reset-cells': > > + const: 1 > > No resources? Then not a dedicated child node, but part of the syscon. > Fold this entire binding into the parent node. > How to fold this binding? Is there any example used to refer? If yes, please tell us. Thanks > > + > > +required: > > + - compatible > > + - '#reset-cells' > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + syscon@16000000 { > > + compatible = "cix,sky1-s5-system-controller", "syscon", > > + "simple-mfd"; > > Mess alignment. > > > + reg = <0x0 0x16000000 0x0 0x1000>; > > Does not belong here. > > > + src: reset-controller { > > + compatible = "cix,sky1-rst"; > > + #reset-cells = <1>; > > + }; > > > + }; > > diff --git > > a/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller > > .yaml > > b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller > > .yaml > > new file mode 100644 > > index 000000000000..f6e2776e3f53 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-contro > > +++ ller.yaml > > @@ -0,0 +1,48 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 > > +--- > > +$id: > > +http://devicetree.org/schemas/soc/cix/cix,sky1-system-controller.yaml > > +# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Cix Sky1 SoC system controller register region > > + > > +maintainers: > > + - Gary Yang <gary.yang@cixtech.com> > > + > > +description: > > + An wide assortment of registers of the system controller on Sky1 > > +SoC, > > + including resets and usb. > > + > > +allOf: > > + - $ref: /schemas/mfd/syscon.yaml# > > + > > +properties: > > + compatible: > > + oneOf: > > + - contains: > > What? No, don't come with random code. There is no single code like this. > > > + - enum: > > + - cix,sky1-system-controller > > + - cix,sky1-s5-system-controller > > + - const: syscon > > + - const: simple-mfd > > Huh? You already documented this. > > NAK, you are making random changes without any concept. > > Read previous feedback. Really carefully. > > Best regards, > Krzysztof Sorry for my mistakes. I don't know how to write binding doc except refer to other bindings. Is there any training docs? Or Please give us some suggestions. Best Regards Gary ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang 2026-01-28 10:01 ` Krzysztof Kozlowski @ 2026-01-28 11:22 ` Rob Herring (Arm) 2026-01-29 1:39 ` 回复: " Gary Yang 1 sibling, 1 reply; 13+ messages in thread From: Rob Herring (Arm) @ 2026-01-28 11:22 UTC (permalink / raw) To: Gary Yang Cc: cix-kernel-upstream, devicetree, krzk+dt, p.zabel, peter.chen, linux-arm-kernel, linux-kernel, lee, conor+dt On Wed, 28 Jan 2026 17:36:09 +0800, Gary Yang wrote: > There are two reset controllers on Cix sky1 Soc. > One is located in S0 domain, and the other is located > in S0 and S5 domain. > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > Link: https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.com > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > --- > .../devicetree/bindings/mfd/syscon.yaml | 7 + > .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ > .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > include/dt-bindings/reset/cix,sky1-rst.h | 164 ++++++++++++++++++ > 5 files changed, 307 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > create mode 100644 Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml > create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: ignoring, error in schema: properties: compatible: oneOf: 0: contains /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' Traceback (most recent call last): File "/usr/local/bin/dt-doc-validate", line 8, in <module> sys.exit(main()) ~~~~^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/doc_validate.py", line 66, in main ret |= check_doc(f) ~~~~~~~~~^^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/doc_validate.py", line 37, in check_doc dtsch.check_schema_refs() ~~~~~~~~~~~~~~~~~~~~~~~^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line 241, in check_schema_refs self._check_schema_refs(resolver, self) ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line 212, in _check_schema_refs self._check_schema_refs(resolver, v, parent=k, is_common=is_common, ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ has_constraint=has_constraint) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line 216, in _check_schema_refs self._check_schema_refs(resolver, schema[i], parent=parent, is_common=is_common, ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ has_constraint=has_constraint) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line 203, in _check_schema_refs ref_sch = resolver.lookup(schema['$ref']).contents ~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^ File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line 682, in lookup retrieved = self._registry.get_or_retrieve(uri) File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line 422, in get_or_retrieve registry = self.crawl() File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line 500, in crawl id = resource.id() File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line 231, in id id = self._specification.id_of(self.contents) File "/usr/local/lib/python3.13/dist-packages/referencing/jsonschema.py", line 50, in _dollar_id return contents.get("$id") ^^^^^^^^^^^^ AttributeError: 'list' object has no attribute 'get' doc reference errors (make refcheckdocs): See https://patchwork.kernel.org/project/devicetree/patch/20260128093611.1932770-2-gary.yang@cixtech.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema. ^ permalink raw reply [flat|nested] 13+ messages in thread
* 回复: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller 2026-01-28 11:22 ` Rob Herring (Arm) @ 2026-01-29 1:39 ` Gary Yang 0 siblings, 0 replies; 13+ messages in thread From: Gary Yang @ 2026-01-29 1:39 UTC (permalink / raw) To: Rob Herring (Arm) Cc: cix-kernel-upstream, devicetree, krzk+dt, p.zabel, Peter Chen, linux-arm-kernel, linux-kernel, lee, conor+dt Hi Rob: Thanks for your comments > -----邮件原件----- > 发件人: Rob Herring (Arm) <robh@kernel.org> > 发送时间: 2026年1月28日 19:23 > 收件人: Gary Yang <gary.yang@cixtech.com> > 抄送: cix-kernel-upstream <cix-kernel-upstream@cixtech.com>; > devicetree@vger.kernel.org; krzk+dt@kernel.org; p.zabel@pengutronix.de; > Peter Chen <peter.chen@cixtech.com>; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; lee@kernel.org; conor+dt@kernel.org > 主题: Re: [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller > > EXTERNAL EMAIL > > On Wed, 28 Jan 2026 17:36:09 +0800, Gary Yang wrote: > > There are two reset controllers on Cix sky1 Soc. > > One is located in S0 domain, and the other is located in S0 and S5 > > domain. > > > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > > Link: > > https://lore.kernel.org/r/20251124063235.952136-2-gary.yang@cixtech.co > > m > > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > > --- > > .../devicetree/bindings/mfd/syscon.yaml | 7 + > > .../bindings/reset/cix,sky1-rst.yaml | 46 +++++ > > .../soc/cix/cix,sky1-system-controller.yaml | 48 +++++ > > include/dt-bindings/reset/cix,sky1-rst-fch.h | 42 +++++ > > include/dt-bindings/reset/cix,sky1-rst.h | 164 > ++++++++++++++++++ > > 5 files changed, 307 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/reset/cix,sky1-rst.yaml > > create mode 100644 > > Documentation/devicetree/bindings/soc/cix/cix,sky1-system-controller.y > > aml create mode 100644 include/dt-bindings/reset/cix,sky1-rst-fch.h > > create mode 100644 include/dt-bindings/reset/cix,sky1-rst.h > > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: ignoring, error in schema: properties: > compatible: oneOf: 0: contains > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc > /cix/cix,sky1-system-controller.yaml: properties:compatible:oneOf:0:contains: > [{'enum': ['cix,sky1-system-controller', 'cix,sky1-s5-system-controller']}, {'const': > 'syscon'}, {'const': 'simple-mfd'}] is not of type 'object', 'boolean' > Traceback (most recent call last): > File "/usr/local/bin/dt-doc-validate", line 8, in <module> > sys.exit(main()) > ~~~~^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/doc_validate.py", > line 66, in main > ret |= check_doc(f) > ~~~~~~~~~^^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/doc_validate.py", > line 37, in check_doc > dtsch.check_schema_refs() > ~~~~~~~~~~~~~~~~~~~~~~~^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line > 241, in check_schema_refs > self._check_schema_refs(resolver, self) > ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line > 212, in _check_schema_refs > self._check_schema_refs(resolver, v, parent=k, is_common=is_common, > > ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > has_constraint=has_constraint) > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line > 216, in _check_schema_refs > self._check_schema_refs(resolver, schema[i], parent=parent, > is_common=is_common, > > ~~~~~~~~~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > ^^^^^^^^^^^^^ > has_constraint=has_constraint) > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > File "/usr/local/lib/python3.13/dist-packages/dtschema/schema.py", line > 203, in _check_schema_refs > ref_sch = resolver.lookup(schema['$ref']).contents > ~~~~~~~~~~~~~~~^^^^^^^^^^^^^^^^ > File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line > 682, in lookup > retrieved = self._registry.get_or_retrieve(uri) > File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line > 422, in get_or_retrieve > registry = self.crawl() > File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line > 500, in crawl > id = resource.id() > File "/usr/local/lib/python3.13/dist-packages/referencing/_core.py", line > 231, in id > id = self._specification.id_of(self.contents) > File "/usr/local/lib/python3.13/dist-packages/referencing/jsonschema.py", > line 50, in _dollar_id > return contents.get("$id") > ^^^^^^^^^^^^ > AttributeError: 'list' object has no attribute 'get' > > doc reference errors (make refcheckdocs): > > See > https://patchwork.kernel.org/project/devicetree/patch/20260128093611.193 > 2770-2-gary.yang@cixtech.com > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above error(s), > then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. OK, we run " make dt_binding_check " command before submit patch. But not found these errors. We will double check it. if found, we will fix them. Best Regards Gary ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 2/3] reset: cix: add support for cix sky1 resets 2026-01-28 9:36 [PATCH v4 0/3] Add support for Cix Sky1 resets Gary Yang 2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang @ 2026-01-28 9:36 ` Gary Yang 2026-01-28 11:27 ` Philipp Zabel ` (2 more replies) 2026-01-28 9:36 ` [PATCH v4 3/3] arm64: dts: " Gary Yang 2 siblings, 3 replies; 13+ messages in thread From: Gary Yang @ 2026-01-28 9:36 UTC (permalink / raw) To: lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream, Gary Yang There are two reset controllers on Cix Sky1 Soc. One is located in S0 domain, and the other is located in S0 and S5 domain. Signed-off-by: Gary Yang <gary.yang@cixtech.com> Link: https://lore.kernel.org/r/20251124063235.952136-3-gary.yang@cixtech.com Signed-off-by: Peter Chen <peter.chen@cixtech.com> --- drivers/reset/Kconfig | 7 + drivers/reset/Makefile | 1 + drivers/reset/reset-sky1.c | 376 +++++++++++++++++++++++++++++++++++++ 3 files changed, 384 insertions(+) create mode 100644 drivers/reset/reset-sky1.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 6e5d6deffa7d..24bf60c4e640 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -291,6 +291,13 @@ config RESET_SIMPLE - SiFive FU740 SoCs - Sophgo SoCs +config RESET_SKY1 + bool "Cix Sky1 reset controller" + depends on HAS_IOMEM + depends on ARCH_CIX || COMPILE_TEST + help + This enables the reset controller for Cix Sky1. + config RESET_SOCFPGA bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) default ARM && ARCH_INTEL_SOCFPGA diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 9c3e484dfd81..0d2e1329561d 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o obj-$(CONFIG_RESET_RZV2H_USB2PHY) += reset-rzv2h-usb2phy.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o +obj-$(CONFIG_RESET_SKY1) += reset-sky1.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SPACEMIT) += reset-spacemit.o obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o diff --git a/drivers/reset/reset-sky1.c b/drivers/reset/reset-sky1.c new file mode 100644 index 000000000000..92e34b48f041 --- /dev/null +++ b/drivers/reset/reset-sky1.c @@ -0,0 +1,376 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * + * CIX System Reset Controller (SRC) driver + * + * Author: Jerry Zhu <jerry.zhu@cixtech.com> + */ + +#include <linux/delay.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> +#include <linux/regmap.h> + +#include <dt-bindings/reset/cix,sky1-rst.h> +#include <dt-bindings/reset/cix,sky1-rst-fch.h> + +#define SKY1_RESET_SLEEP_MIN_US 50 +#define SKY1_RESET_SLEEP_MAX_US 100 + +struct sky1_src_signal { + unsigned int offset; + unsigned int bit; +}; + +struct sky1_src_variant { + const struct sky1_src_signal *signals; + unsigned int signals_num; +}; + +struct sky1_src { + struct reset_controller_dev rcdev; + const struct sky1_src_signal *signals; + struct regmap *regmap; +}; + +enum { + CSU_PM_RESET = 0x304, + SENSORFUSION_RESET = 0x308, + SENSORFUSION_NOC_RESET = 0x30c, + RESET_GROUP0_S0_DOMAIN_0 = 0x400, + RESET_GROUP0_S0_DOMAIN_1 = 0x404, + RESET_GROUP1_USB_PHYS = 0x408, + RESET_GROUP1_USB_CONTROLLERS = 0x40c, + RESET_GROUP0_RCSU = 0x800, + RESET_GROUP1_RCSU = 0x804, +}; + +static const struct sky1_src_signal sky1_src_signals[] = { + /* reset group1 for s0 domain modules */ + [SKY1_CSU_PM_RESET_N] = { CSU_PM_RESET, BIT(0) }, + [SKY1_SENSORFUSION_RESET_N] = { SENSORFUSION_RESET, BIT(0) }, + [SKY1_SENSORFUSION_NOC_RESET_N] = { SENSORFUSION_NOC_RESET, BIT(0) }, + [SKY1_DDRC_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(0) }, + [SKY1_GIC_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(1) }, + [SKY1_CI700_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(2) }, + [SKY1_SYS_NI700_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(3) }, + [SKY1_MM_NI700_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(4) }, + [SKY1_PCIE_NI700_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(5) }, + [SKY1_GPU_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(6) }, + [SKY1_NPUTOP_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(7) }, + [SKY1_NPUCORE0_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(8) }, + [SKY1_NPUCORE1_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(9) }, + [SKY1_NPUCORE2_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(10) }, + [SKY1_VPU_RESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(11) }, + [SKY1_ISP_SRESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(12) }, + [SKY1_ISP_ARESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(13) }, + [SKY1_ISP_HRESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(14) }, + [SKY1_ISP_GDCRESET_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(15) }, + [SKY1_DPU_RESET0_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(16) }, + [SKY1_DPU_RESET1_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(17) }, + [SKY1_DPU_RESET2_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(18) }, + [SKY1_DPU_RESET3_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(19) }, + [SKY1_DPU_RESET4_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(20) }, + [SKY1_DP_RESET0_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(21) }, + [SKY1_DP_RESET1_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(22) }, + [SKY1_DP_RESET2_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(23) }, + [SKY1_DP_RESET3_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(24) }, + [SKY1_DP_RESET4_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(25) }, + [SKY1_DP_PHY_RST_N] = { RESET_GROUP0_S0_DOMAIN_0, BIT(26) }, + + /* reset group1 for s0 domain modules */ + [SKY1_AUDIO_HIFI5_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(0) }, + [SKY1_AUDIO_HIFI5_NOC_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(1) }, + [SKY1_CSIDPHY_PRST0_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(2) }, + [SKY1_CSIDPHY_CMNRST0_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(3) }, + [SKY1_CSI0_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(4) }, + [SKY1_CSIDPHY_PRST1_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(5) }, + [SKY1_CSIDPHY_CMNRST1_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(6) }, + [SKY1_CSI1_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(7) }, + [SKY1_CSI2_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(8) }, + [SKY1_CSI3_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(9) }, + [SKY1_CSIBRDGE0_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(10) }, + [SKY1_CSIBRDGE1_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(11) }, + [SKY1_CSIBRDGE2_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(12) }, + [SKY1_CSIBRDGE3_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(13) }, + [SKY1_GMAC0_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(14) }, + [SKY1_GMAC1_RST_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(15) }, + [SKY1_PCIE0_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(16) }, + [SKY1_PCIE1_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(17) }, + [SKY1_PCIE2_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(18) }, + [SKY1_PCIE3_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(19) }, + [SKY1_PCIE4_RESET_N] = { RESET_GROUP0_S0_DOMAIN_1, BIT(20) }, + + /* reset group1 for usb phys */ + [SKY1_USB_DP_PHY0_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(0) }, + [SKY1_USB_DP_PHY1_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(1) }, + [SKY1_USB_DP_PHY2_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(2) }, + [SKY1_USB_DP_PHY3_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(3) }, + [SKY1_USB_DP_PHY0_RST_N] = { RESET_GROUP1_USB_PHYS, BIT(4) }, + [SKY1_USB_DP_PHY1_RST_N] = { RESET_GROUP1_USB_PHYS, BIT(5) }, + [SKY1_USB_DP_PHY2_RST_N] = { RESET_GROUP1_USB_PHYS, BIT(6) }, + [SKY1_USB_DP_PHY3_RST_N] = { RESET_GROUP1_USB_PHYS, BIT(7) }, + [SKY1_USBPHY_SS_PST_N] = { RESET_GROUP1_USB_PHYS, BIT(8) }, + [SKY1_USBPHY_SS_RST_N] = { RESET_GROUP1_USB_PHYS, BIT(9) }, + [SKY1_USBPHY_HS0_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(10) }, + [SKY1_USBPHY_HS1_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(11) }, + [SKY1_USBPHY_HS2_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(12) }, + [SKY1_USBPHY_HS3_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(13) }, + [SKY1_USBPHY_HS4_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(14) }, + [SKY1_USBPHY_HS5_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(15) }, + [SKY1_USBPHY_HS6_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(16) }, + [SKY1_USBPHY_HS7_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(17) }, + [SKY1_USBPHY_HS8_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(18) }, + [SKY1_USBPHY_HS9_PRST_N] = { RESET_GROUP1_USB_PHYS, BIT(19) }, + + /* reset group1 for usb controllers */ + [SKY1_USBC_SS0_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(0) }, + [SKY1_USBC_SS1_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(1) }, + [SKY1_USBC_SS2_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(2) }, + [SKY1_USBC_SS3_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(3) }, + [SKY1_USBC_SS4_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(4) }, + [SKY1_USBC_SS5_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(5) }, + [SKY1_USBC_SS0_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(6) }, + [SKY1_USBC_SS1_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(7) }, + [SKY1_USBC_SS2_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(8) }, + [SKY1_USBC_SS3_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(9) }, + [SKY1_USBC_SS4_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(10) }, + [SKY1_USBC_SS5_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(11) }, + [SKY1_USBC_HS0_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(12) }, + [SKY1_USBC_HS1_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(13) }, + [SKY1_USBC_HS2_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(14) }, + [SKY1_USBC_HS3_PRST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(15) }, + [SKY1_USBC_HS0_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(16) }, + [SKY1_USBC_HS1_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(17) }, + [SKY1_USBC_HS2_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(18) }, + [SKY1_USBC_HS3_RST_N] = { RESET_GROUP1_USB_CONTROLLERS, BIT(19) }, + + /* reset group0 for rcsu */ + [SKY1_AUDIO_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(0) }, + [SKY1_CI700_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(1) }, + [SKY1_CSI_RCSU0_RESET_N] = { RESET_GROUP0_RCSU, BIT(2) }, + [SKY1_CSI_RCSU1_RESET_N] = { RESET_GROUP0_RCSU, BIT(3) }, + [SKY1_CSU_PM_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(4) }, + [SKY1_DDR_BROADCAST_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(5) }, + [SKY1_DDR_CTRL_RCSU_0_RESET_N] = { RESET_GROUP0_RCSU, BIT(6) }, + [SKY1_DDR_CTRL_RCSU_1_RESET_N] = { RESET_GROUP0_RCSU, BIT(7) }, + [SKY1_DDR_CTRL_RCSU_2_RESET_N] = { RESET_GROUP0_RCSU, BIT(8) }, + [SKY1_DDR_CTRL_RCSU_3_RESET_N] = { RESET_GROUP0_RCSU, BIT(9) }, + [SKY1_DDR_TZC400_RCSU_0_RESET_N] = { RESET_GROUP0_RCSU, BIT(10) }, + [SKY1_DDR_TZC400_RCSU_1_RESET_N] = { RESET_GROUP0_RCSU, BIT(11) }, + [SKY1_DDR_TZC400_RCSU_2_RESET_N] = { RESET_GROUP0_RCSU, BIT(12) }, + [SKY1_DDR_TZC400_RCSU_3_RESET_N] = { RESET_GROUP0_RCSU, BIT(13) }, + [SKY1_DP0_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(14) }, + [SKY1_DP1_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(15) }, + [SKY1_DP2_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(16) }, + [SKY1_DP3_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(17) }, + [SKY1_DP4_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(18) }, + [SKY1_DPU0_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(19) }, + [SKY1_DPU1_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(20) }, + [SKY1_DPU2_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(21) }, + [SKY1_DPU3_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(22) }, + [SKY1_DPU4_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(23) }, + [SKY1_DSU_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(24) }, + [SKY1_FCH_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(25) }, + [SKY1_GICD_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(26) }, + [SKY1_GMAC_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(27) }, + [SKY1_GPU_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(28) }, + [SKY1_ISP_RCSU0_RESET_N] = { RESET_GROUP0_RCSU, BIT(29) }, + [SKY1_ISP_RCSU1_RESET_N] = { RESET_GROUP0_RCSU, BIT(30) }, + [SKY1_NI700_MMHUB_RCSU_RESET_N] = { RESET_GROUP0_RCSU, BIT(31) }, + + /* reset group1 for rcsu */ + [SKY1_NPU_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(0) }, + [SKY1_NI700_PCIE_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(1) }, + [SKY1_PCIE_X421_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(2) }, + [SKY1_PCIE_X8_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(3) }, + [SKY1_SF_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(4) }, + [SKY1_RCSU_SMMU_MMHUB_RESET_N] = { RESET_GROUP1_RCSU, BIT(5) }, + [SKY1_RCSU_SMMU_PCIEHUB_RESET_N] = { RESET_GROUP1_RCSU, BIT(6) }, + [SKY1_RCSU_SYSHUB_RESET_N] = { RESET_GROUP1_RCSU, BIT(7) }, + [SKY1_NI700_SMN_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(8) }, + [SKY1_NI700_SYSHUB_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(9) }, + [SKY1_RCSU_USB2_HOST0_RESET_N] = { RESET_GROUP1_RCSU, BIT(10) }, + [SKY1_RCSU_USB2_HOST1_RESET_N] = { RESET_GROUP1_RCSU, BIT(11) }, + [SKY1_RCSU_USB2_HOST2_RESET_N] = { RESET_GROUP1_RCSU, BIT(12) }, + [SKY1_RCSU_USB2_HOST3_RESET_N] = { RESET_GROUP1_RCSU, BIT(13) }, + [SKY1_RCSU_USB3_TYPEA_DRD_RESET_N] = { RESET_GROUP1_RCSU, BIT(14) }, + [SKY1_RCSU_USB3_TYPEC_DRD_RESET_N] = { RESET_GROUP1_RCSU, BIT(15) }, + [SKY1_RCSU_USB3_TYPEC_HOST0_RESET_N] = { RESET_GROUP1_RCSU, BIT(16) }, + [SKY1_RCSU_USB3_TYPEC_HOST1_RESET_N] = { RESET_GROUP1_RCSU, BIT(17) }, + [SKY1_RCSU_USB3_TYPEC_HOST2_RESET_N] = { RESET_GROUP1_RCSU, BIT(18) }, + [SKY1_VPU_RCSU_RESET_N] = { RESET_GROUP1_RCSU, BIT(19) }, +}; + +enum { + FCH_SW_RST_FUNC = 0x8, + FCH_SW_RST_BUS = 0xc, + FCH_SW_XSPI = 0x10, +}; + +static const struct sky1_src_signal sky1_src_fch_signals[] = { + /* resets for fch_sw_rst_func */ + [SW_I3C0_RST_FUNC_G_N] = { FCH_SW_RST_FUNC, BIT(0) }, + [SW_I3C0_RST_FUNC_I_N] = { FCH_SW_RST_FUNC, BIT(1) }, + [SW_I3C1_RST_FUNC_G_N] = { FCH_SW_RST_FUNC, BIT(2) }, + [SW_I3C1_RST_FUNC_I_N] = { FCH_SW_RST_FUNC, BIT(3) }, + [SW_UART0_RST_FUNC_N] = { FCH_SW_RST_FUNC, BIT(4) }, + [SW_UART1_RST_FUNC_N] = { FCH_SW_RST_FUNC, BIT(5) }, + [SW_UART2_RST_FUNC_N] = { FCH_SW_RST_FUNC, BIT(6) }, + [SW_UART3_RST_FUNC_N] = { FCH_SW_RST_FUNC, BIT(7) }, + [SW_TIMER_RST_FUNC_N] = { FCH_SW_RST_FUNC, BIT(20) }, + + /* resets for fch_sw_rst_bus */ + [SW_I3C0_RST_APB_N] = { FCH_SW_RST_BUS, BIT(0) }, + [SW_I3C1_RST_APB_N] = { FCH_SW_RST_BUS, BIT(1) }, + [SW_DMA_RST_AXI_N] = { FCH_SW_RST_BUS, BIT(2) }, + [SW_UART0_RST_APB_N] = { FCH_SW_RST_BUS, BIT(4) }, + [SW_UART1_RST_APB_N] = { FCH_SW_RST_BUS, BIT(5) }, + [SW_UART2_RST_APB_N] = { FCH_SW_RST_BUS, BIT(6) }, + [SW_UART3_RST_APB_N] = { FCH_SW_RST_BUS, BIT(7) }, + [SW_SPI0_RST_APB_N] = { FCH_SW_RST_BUS, BIT(8) }, + [SW_SPI1_RST_APB_N] = { FCH_SW_RST_BUS, BIT(9) }, + [SW_I2C0_RST_APB_N] = { FCH_SW_RST_BUS, BIT(12) }, + [SW_I2C1_RST_APB_N] = { FCH_SW_RST_BUS, BIT(13) }, + [SW_I2C2_RST_APB_N] = { FCH_SW_RST_BUS, BIT(14) }, + [SW_I2C3_RST_APB_N] = { FCH_SW_RST_BUS, BIT(15) }, + [SW_I2C4_RST_APB_N] = { FCH_SW_RST_BUS, BIT(16) }, + [SW_I2C5_RST_APB_N] = { FCH_SW_RST_BUS, BIT(17) }, + [SW_I2C6_RST_APB_N] = { FCH_SW_RST_BUS, BIT(18) }, + [SW_I2C7_RST_APB_N] = { FCH_SW_RST_BUS, BIT(19) }, + [SW_GPIO_RST_APB_N] = { FCH_SW_RST_BUS, BIT(21) }, + + /* resets for fch_sw_xspi */ + [SW_XSPI_REG_RST_N] = { FCH_SW_XSPI, BIT(0) }, + [SW_XSPI_SYS_RST_N] = { FCH_SW_XSPI, BIT(1) }, +}; + +static struct sky1_src *to_sky1_src(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct sky1_src, rcdev); +} + +static int sky1_reset_set(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct sky1_src *sky1src = to_sky1_src(rcdev); + const struct sky1_src_signal *signal = &sky1src->signals[id]; + unsigned int value = assert ? 0 : sky1src->signals[id].bit; + + return regmap_update_bits(sky1src->regmap, + signal->offset, signal->bit, value); +} + +static int sky1_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + sky1_reset_set(rcdev, id, true); + usleep_range(SKY1_RESET_SLEEP_MIN_US, + SKY1_RESET_SLEEP_MAX_US); + return 0; +} + +static int sky1_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + sky1_reset_set(rcdev, id, false); + usleep_range(SKY1_RESET_SLEEP_MIN_US, + SKY1_RESET_SLEEP_MAX_US); + return 0; +} + +static int sky1_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + sky1_reset_assert(rcdev, id); + sky1_reset_deassert(rcdev, id); + return 0; +} + +static int sky1_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + unsigned int value = 0; + struct sky1_src *sky1src = to_sky1_src(rcdev); + const struct sky1_src_signal *signal = &sky1src->signals[id]; + + regmap_read(sky1src->regmap, signal->offset, &value); + return !(value & signal->bit); +} + +static const struct sky1_src_variant variant_sky1 = { + .signals = sky1_src_signals, + .signals_num = ARRAY_SIZE(sky1_src_signals), +}; + +static const struct sky1_src_variant variant_sky1_fch = { + .signals = sky1_src_fch_signals, + .signals_num = ARRAY_SIZE(sky1_src_fch_signals), +}; + +static const struct reset_control_ops sky1_src_ops = { + .reset = sky1_reset, + .assert = sky1_reset_assert, + .deassert = sky1_reset_deassert, + .status = sky1_reset_status +}; + +static const struct regmap_config sky1_src_config[] = { + { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .name = "src", + }, +}; + +static int sky1_reset_probe(struct platform_device *pdev) +{ + struct sky1_src *sky1src; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + const struct sky1_src_variant *variant = of_device_get_match_data(dev); + + sky1src = devm_kzalloc(dev, sizeof(*sky1src), GFP_KERNEL); + if (!sky1src) + return -ENOMEM; + + sky1src->regmap = device_node_to_regmap(np->parent); + if (IS_ERR(sky1src->regmap)) { + dev_err(dev, "Unable to get sky1-src regmap"); + return PTR_ERR(sky1src->regmap); + } + + sky1src->signals = variant->signals; + sky1src->rcdev.owner = THIS_MODULE; + sky1src->rcdev.nr_resets = variant->signals_num; + sky1src->rcdev.ops = &sky1_src_ops; + sky1src->rcdev.of_node = dev->of_node; + sky1src->rcdev.dev = dev; + + return devm_reset_controller_register(dev, &sky1src->rcdev); +} + +static const struct of_device_id sky1_reset_dt_ids[] = { + { .compatible = "cix,sky1-rst", .data = &variant_sky1 }, + { .compatible = "cix,sky1-rst-fch", .data = &variant_sky1_fch }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, sky1_reset_dt_ids); + +static struct platform_driver sky1_reset_driver = { + .probe = sky1_reset_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = sky1_reset_dt_ids, + }, +}; +module_platform_driver(sky1_reset_driver) + +MODULE_AUTHOR("Jerry Zhu <jerry.zhu@cixtech.com>"); +MODULE_DESCRIPTION("Cix Sky1 reset driver"); +MODULE_LICENSE("GPL"); -- 2.49.0 ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang @ 2026-01-28 11:27 ` Philipp Zabel 2026-01-29 1:26 ` 回复: " Gary Yang 2026-01-28 17:43 ` kernel test robot 2026-01-29 0:17 ` kernel test robot 2 siblings, 1 reply; 13+ messages in thread From: Philipp Zabel @ 2026-01-28 11:27 UTC (permalink / raw) To: Gary Yang, lee, robh, krzk+dt, conor+dt, peter.chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream On Mi, 2026-01-28 at 17:36 +0800, Gary Yang wrote: > There are two reset controllers on Cix Sky1 Soc. > One is located in S0 domain, and the other is located > in S0 and S5 domain. > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > Link: https://lore.kernel.org/r/20251124063235.952136-3-gary.yang@cixtech.com > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > --- > drivers/reset/Kconfig | 7 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-sky1.c | 376 +++++++++++++++++++++++++++++++++++++ > 3 files changed, 384 insertions(+) > create mode 100644 drivers/reset/reset-sky1.c > [...] > diff --git a/drivers/reset/reset-sky1.c b/drivers/reset/reset-sky1.c > new file mode 100644 > index 000000000000..92e34b48f041 > --- /dev/null > +++ b/drivers/reset/reset-sky1.c > @@ -0,0 +1,376 @@ [...] > +static const struct regmap_config sky1_src_config[] = { > + { > + .reg_bits = 32, > + .val_bits = 32, > + .reg_stride = 4, > + .name = "src", > + }, > +}; This looks unused. regards Philipp ^ permalink raw reply [flat|nested] 13+ messages in thread
* 回复: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets 2026-01-28 11:27 ` Philipp Zabel @ 2026-01-29 1:26 ` Gary Yang 0 siblings, 0 replies; 13+ messages in thread From: Gary Yang @ 2026-01-29 1:26 UTC (permalink / raw) To: Philipp Zabel, lee, robh, krzk+dt, conor+dt, Peter Chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream Hi Philipp: Thanks for your comments > -----邮件原件----- > 发件人: Philipp Zabel <p.zabel@pengutronix.de> > 发送时间: 2026年1月28日 19:27 > 收件人: Gary Yang <gary.yang@cixtech.com>; lee@kernel.org; > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; Peter Chen > <peter.chen@cixtech.com> > 抄送: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; cix-kernel-upstream > <cix-kernel-upstream@cixtech.com> > 主题: Re: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets > > EXTERNAL EMAIL > > CAUTION: Suspicious Email from unusual domain. > > On Mi, 2026-01-28 at 17:36 +0800, Gary Yang wrote: > > There are two reset controllers on Cix Sky1 Soc. > > One is located in S0 domain, and the other is located in S0 and S5 > > domain. > > > > Signed-off-by: Gary Yang <gary.yang@cixtech.com> > > Link: > > https://lore.kernel.org/r/20251124063235.952136-3-gary.yang@cixtech.co > > m > > Signed-off-by: Peter Chen <peter.chen@cixtech.com> > > --- > > drivers/reset/Kconfig | 7 + > > drivers/reset/Makefile | 1 + > > drivers/reset/reset-sky1.c | 376 > > +++++++++++++++++++++++++++++++++++++ > > 3 files changed, 384 insertions(+) > > create mode 100644 drivers/reset/reset-sky1.c > > > [...] > > diff --git a/drivers/reset/reset-sky1.c b/drivers/reset/reset-sky1.c > > new file mode 100644 index 000000000000..92e34b48f041 > > --- /dev/null > > +++ b/drivers/reset/reset-sky1.c > > @@ -0,0 +1,376 @@ > [...] > > +static const struct regmap_config sky1_src_config[] = { > > + { > > + .reg_bits = 32, > > + .val_bits = 32, > > + .reg_stride = 4, > > + .name = "src", > > + }, > > +}; > > This looks unused. > Yes, you're right, we will delete it next patch Best Regards Gary > regards > Philipp ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang 2026-01-28 11:27 ` Philipp Zabel @ 2026-01-28 17:43 ` kernel test robot 2026-01-29 0:17 ` kernel test robot 2 siblings, 0 replies; 13+ messages in thread From: kernel test robot @ 2026-01-28 17:43 UTC (permalink / raw) To: Gary Yang, lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: oe-kbuild-all, devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream, Gary Yang Hi Gary, kernel test robot noticed the following build warnings: [auto build test WARNING on robh/for-next] [also build test WARNING on lee-leds/for-leds-next linus/master v6.19-rc7 next-20260127] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Gary-Yang/dt-bindings-reset-add-sky1-reset-controller/20260128-174335 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next patch link: https://lore.kernel.org/r/20260128093611.1932770-3-gary.yang%40cixtech.com patch subject: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20260129/202601290142.8FfZLLZk-lkp@intel.com/config) compiler: alpha-linux-gcc (GCC) 15.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260129/202601290142.8FfZLLZk-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202601290142.8FfZLLZk-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/reset/reset-sky1.c:322:35: warning: 'sky1_src_config' defined but not used [-Wunused-const-variable=] 322 | static const struct regmap_config sky1_src_config[] = { | ^~~~~~~~~~~~~~~ vim +/sky1_src_config +322 drivers/reset/reset-sky1.c 321 > 322 static const struct regmap_config sky1_src_config[] = { 323 { 324 .reg_bits = 32, 325 .val_bits = 32, 326 .reg_stride = 4, 327 .name = "src", 328 }, 329 }; 330 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang 2026-01-28 11:27 ` Philipp Zabel 2026-01-28 17:43 ` kernel test robot @ 2026-01-29 0:17 ` kernel test robot 2 siblings, 0 replies; 13+ messages in thread From: kernel test robot @ 2026-01-29 0:17 UTC (permalink / raw) To: Gary Yang, lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: llvm, oe-kbuild-all, devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream, Gary Yang Hi Gary, kernel test robot noticed the following build warnings: [auto build test WARNING on robh/for-next] [also build test WARNING on lee-leds/for-leds-next linus/master v6.19-rc7 next-20260128] [cannot apply to pza/reset/next pza/imx-drm/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Gary-Yang/dt-bindings-reset-add-sky1-reset-controller/20260128-174335 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next patch link: https://lore.kernel.org/r/20260128093611.1932770-3-gary.yang%40cixtech.com patch subject: [PATCH v4 2/3] reset: cix: add support for cix sky1 resets config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20260129/202601290838.4jtWi90B-lkp@intel.com/config) compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260129/202601290838.4jtWi90B-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202601290838.4jtWi90B-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/reset/reset-sky1.c:322:35: warning: unused variable 'sky1_src_config' [-Wunused-const-variable] 322 | static const struct regmap_config sky1_src_config[] = { | ^~~~~~~~~~~~~~~ 1 warning generated. vim +/sky1_src_config +322 drivers/reset/reset-sky1.c 321 > 322 static const struct regmap_config sky1_src_config[] = { 323 { 324 .reg_bits = 32, 325 .val_bits = 32, 326 .reg_stride = 4, 327 .name = "src", 328 }, 329 }; 330 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 3/3] arm64: dts: cix: add support for cix sky1 resets 2026-01-28 9:36 [PATCH v4 0/3] Add support for Cix Sky1 resets Gary Yang 2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang @ 2026-01-28 9:36 ` Gary Yang 2 siblings, 0 replies; 13+ messages in thread From: Gary Yang @ 2026-01-28 9:36 UTC (permalink / raw) To: lee, robh, krzk+dt, conor+dt, p.zabel, peter.chen Cc: devicetree, linux-kernel, linux-arm-kernel, cix-kernel-upstream, Gary Yang There are two reset conctrollers on Cix Sky1 Soc. One is located in S0 domain, and the other is located in S0 and S5 domain. Signed-off-by: Gary Yang <gary.yang@cixtech.com> Link: https://lore.kernel.org/r/20251124063235.952136-4-gary.yang@cixtech.com Signed-off-by: Peter Chen <peter.chen@cixtech.com> --- arch/arm64/boot/dts/cix/sky1.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi index 64b76905cbff..45c008bf580a 100644 --- a/arch/arm64/boot/dts/cix/sky1.dtsi +++ b/arch/arm64/boot/dts/cix/sky1.dtsi @@ -348,6 +348,17 @@ i3c1: i3c@4100000 { status = "disabled"; }; + syscon: syscon@4160000 { + compatible = "cix,sky1-system-controller", "syscon", + "simple-mfd"; + reg = <0x0 0x4160000 0x0 0x100>; + + src_fch: reset-controller { + compatible = "cix,sky1-rst-fch"; + #reset-cells = <1>; + }; + }; + iomuxc: pinctrl@4170000 { compatible = "cix,sky1-pinctrl"; reg = <0x0 0x04170000 0x0 0x1000>; @@ -568,6 +579,17 @@ ppi_partition1: interrupt-partition-1 { }; }; + s5_syscon: s5-syscon@16000000 { + compatible = "cix,sky1-s5-system-controller", "syscon", + "simple-mfd"; + reg = <0x0 0x16000000 0x0 0x1000>; + + src: reset-controller { + compatible = "cix,sky1-rst"; + #reset-cells = <1>; + }; + }; + iomuxc_s5: pinctrl@16007000 { compatible = "cix,sky1-pinctrl-s5"; reg = <0x0 0x16007000 0x0 0x1000>; -- 2.49.0 ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2026-01-29 1:58 UTC | newest] Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2026-01-28 9:36 [PATCH v4 0/3] Add support for Cix Sky1 resets Gary Yang 2026-01-28 9:36 ` [PATCH v4 1/3] dt-bindings: reset: add sky1 reset controller Gary Yang 2026-01-28 10:01 ` Krzysztof Kozlowski 2026-01-28 10:14 ` Conor Dooley 2026-01-29 1:58 ` 回复: " Gary Yang 2026-01-28 11:22 ` Rob Herring (Arm) 2026-01-29 1:39 ` 回复: " Gary Yang 2026-01-28 9:36 ` [PATCH v4 2/3] reset: cix: add support for cix sky1 resets Gary Yang 2026-01-28 11:27 ` Philipp Zabel 2026-01-29 1:26 ` 回复: " Gary Yang 2026-01-28 17:43 ` kernel test robot 2026-01-29 0:17 ` kernel test robot 2026-01-28 9:36 ` [PATCH v4 3/3] arm64: dts: " Gary Yang
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