* [PATCH 1/4] arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers
2026-02-01 19:18 [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
@ 2026-02-01 19:18 ` Heiko Stuebner
2026-02-01 19:18 ` [PATCH 2/4] arm64: dts: rockchip: add overlay for qnap-ts433 device revision Heiko Stuebner
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2026-02-01 19:18 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel
The SATA controllers on RK356x are identical to the ones found on RK3588,
but don't yet provide a port sub-node. Per the datasheet the RK356x also
supports the fbscp capability and has the same queue maximums.
So add port sub-nodes to both sata controllers on RK356x, and move the
phy properties to it. Also add phandles to the ports, so that boards can
add their target-supply when available.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 27 ++++++++++++++++---
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
index b84055a77ac5..c6bd051b6a25 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
@@ -3,6 +3,7 @@
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*/
+#include <dt-bindings/ata/ahci.h>
#include <dt-bindings/clock/rk3568-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
@@ -234,11 +235,20 @@ sata1: sata@fc400000 {
<&cru CLK_SATA1_RXOOB>;
clock-names = "sata", "pmalive", "rxoob";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&combphy1 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
ports-implemented = <0x1>;
power-domains = <&power RK3568_PD_PIPE>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
+
+ sata1_port0: sata-port@0 {
+ reg = <0>;
+ hba-port-cap = <HBA_PORT_FBSCP>;
+ phys = <&combphy1 PHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ snps,rx-ts-max = <32>;
+ snps,tx-ts-max = <32>;
+ };
};
sata2: sata@fc800000 {
@@ -248,11 +258,20 @@ sata2: sata@fc800000 {
<&cru CLK_SATA2_RXOOB>;
clock-names = "sata", "pmalive", "rxoob";
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&combphy2 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
ports-implemented = <0x1>;
power-domains = <&power RK3568_PD_PIPE>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
+
+ sata2_port0: sata-port@0 {
+ reg = <0>;
+ hba-port-cap = <HBA_PORT_FBSCP>;
+ phys = <&combphy2 PHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ snps,rx-ts-max = <32>;
+ snps,tx-ts-max = <32>;
+ };
};
usb_host0_xhci: usb@fcc00000 {
--
2.47.2
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/4] arm64: dts: rockchip: add overlay for qnap-ts433 device revision
2026-02-01 19:18 [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
2026-02-01 19:18 ` [PATCH 1/4] arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers Heiko Stuebner
@ 2026-02-01 19:18 ` Heiko Stuebner
2026-02-01 19:18 ` [PATCH 3/4] arm64: dts: rockchip: add overlay for qnap-ts233 " Heiko Stuebner
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2026-02-01 19:18 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel
TS433 devices received a board revision adding gpios for per hard-disk
presence-detection and power-control. These board have a PCB-id of at
least 12 (mainboard) and 10 (backplane), which can be read from an EEPROM.
The presence detection is not really necessary and there are also no
existing bindings for doing something with it. So add them as gpio hogs
to at least document them and allow their state to be read from debugfs.
The power-control is modelled as regulators, with the hdd1+hdd2 variants
connected to the RK3568's SATA controllers as target-supplies. The
JMicron AHCI controller on PCIe didn't have bindings for that, I could
find, so they get an always-on state for now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 5 +
.../rockchip/rk3568-qnap-ts433-pcb-12-10.dtso | 151 ++++++++++++++++++
2 files changed, 156 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index d0f22d3a3bb4..aafffecfb2ef 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
@@ -245,6 +246,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb
rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \
rk3399-rockpro64-screen.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtb
+rk3568-qnap-ts433-pcb-12-10-dtbs := rk3568-qnap-ts433.dtb \
+ rk3568-qnap-ts433-pcb-12-10.dtbo
+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-vz-2-uhd.dtb
rk3568-wolfvision-pf5-vz-2-uhd-dtbs := rk3568-wolfvision-pf5.dtb \
rk3568-wolfvision-pf5-display-vz.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso
new file mode 100644
index 000000000000..ce0fdc9f2989
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433-pcb-12-10.dtso
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for TS433 board PCBs-12-10 revision.
+ *
+ * Copyright (C) 2025 Heiko Stuebner <heiko@sntech.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ /*
+ * The default hardware-state of this gpio causes the drive
+ * to be already running when entering the kernel.
+ * regulator-boot-on is needed to prevent one additional
+ * power-cycle on the drive.
+ *
+ * With regulator-boot-on we get the expected 1 cycle
+ * per boot, without it we end up with 2 cycles as seen
+ * via smartctl.
+ */
+ hdd1_pwr: regulator-hdd1-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_power_pin>;
+ regulator-name = "hdd1-power";
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ hdd2_pwr: regulator-hdd2-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd2_power_pin>;
+ regulator-name = "hdd2-power";
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ /*
+ * HDD3+4 are connected to ports of the PCIe SATA controller.
+ * Currently there is no way to attach those, so keep them
+ * always on.
+ */
+ hdd3_pwr: regulator-hdd3-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd3_power_pin>;
+ regulator-name = "hdd3-power";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ hdd4_pwr: regulator-hdd4-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd4_power_pin>;
+ regulator-name = "hdd4-power";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+&gpio2 {
+ hdd1-present-hog {
+ gpios = <RK_PA2 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd1-present";
+ };
+
+ hdd2-present-hog {
+ gpios = <RK_PA1 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd2-present";
+ };
+
+ hdd3-present-hog {
+ gpios = <RK_PD0 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd3-present";
+ };
+
+ hdd4-present-hog {
+ gpios = <RK_PD1 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd4-present";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_present_pin &hdd2_present_pin &hdd3_present_pin
+ &hdd4_present_pin>;
+
+ hdd-power {
+ hdd1_power_pin: hdd1-power-pin {
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ hdd2_power_pin: hdd2-power-pin {
+ rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ hdd3_power_pin: hdd3-power-pin {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ hdd4_power_pin: hdd4-power-pin {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdd-present {
+ hdd1_present_pin: hdd1-present-pin {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd2_present_pin: hdd2-present-pin {
+ rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd3_present_pin: hdd3-present-pin {
+ rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd4_present_pin: hdd4-present-pin {
+ rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sata1_port0 {
+ target-supply = <&hdd2_pwr>;
+};
+
+&sata2_port0 {
+ target-supply = <&hdd1_pwr>;
+};
--
2.47.2
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 3/4] arm64: dts: rockchip: add overlay for qnap-ts233 device revision
2026-02-01 19:18 [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
2026-02-01 19:18 ` [PATCH 1/4] arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers Heiko Stuebner
2026-02-01 19:18 ` [PATCH 2/4] arm64: dts: rockchip: add overlay for qnap-ts433 device revision Heiko Stuebner
@ 2026-02-01 19:18 ` Heiko Stuebner
2026-02-01 19:18 ` [PATCH 4/4] arm64: dts: rockchip: add overlay for qnap-ts133 " Heiko Stuebner
2026-02-22 22:39 ` [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
4 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2026-02-01 19:18 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel
TS233 devices received a board revision adding gpios for per hard-disk
presence-detection and power-control. These boards have a PCB-id of at
least 12 (mainboard) and 11 (backplane), which can be read from an EEPROM.
The presence detection is not really necessary and there are also no
existing bindings for doing something with it. So add them as gpio hogs
to at least document them and allow their state to be read from debugfs.
The power-control is modelled as regulators, with the hdd1+hdd2 variants
connected to the RK3568's SATA controllers as target-supplies.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 5 +
.../rockchip/rk3568-qnap-ts233-pcb-12-11.dtso | 93 +++++++++++++++++++
2 files changed, 98 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index aafffecfb2ef..c5086aa9c427 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -144,6 +144,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
@@ -246,6 +247,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb
rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \
rk3399-rockpro64-screen.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtb
+rk3568-qnap-ts233-pcb-12-11-dtbs := rk3568-qnap-ts233.dtb \
+ rk3568-qnap-ts233-pcb-12-11.dtbo
+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts433-pcb-12-10.dtb
rk3568-qnap-ts433-pcb-12-10-dtbs := rk3568-qnap-ts433.dtb \
rk3568-qnap-ts433-pcb-12-10.dtbo
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso
new file mode 100644
index 000000000000..c7987171644c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233-pcb-12-11.dtso
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for TS233 board PCBs-12-11 revision.
+ *
+ * Copyright (C) 2025 Heiko Stuebner <heiko@sntech.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ /*
+ * The default hardware-state of this gpio causes the drive
+ * to be already running when entering the kernel.
+ * regulator-boot-on is needed to prevent one additional
+ * power-cycle on the drive.
+ *
+ * With regulator-boot-on we get the expected 1 cycle
+ * per boot, without it we end up with 2 cycles as seen
+ * via smartctl.
+ */
+ hdd1_pwr: regulator-hdd1-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_power_pin>;
+ regulator-name = "hdd1-power";
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+
+ hdd2_pwr: regulator-hdd2-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd2_power_pin>;
+ regulator-name = "hdd2-power";
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+&gpio2 {
+ hdd1-present-hog {
+ gpios = <RK_PA2 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd1-present";
+ };
+
+ hdd2-present-hog {
+ gpios = <RK_PA1 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd2-present";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_present_pin &hdd2_present_pin>;
+
+ hdd-power {
+ hdd1_power_pin: hdd1-power-pin {
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ hdd2_power_pin: hdd2-power-pin {
+ rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdd-present {
+ hdd1_present_pin: hdd1-present-pin {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ hdd2_present_pin: hdd2-present-pin {
+ rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sata1_port0 {
+ target-supply = <&hdd2_pwr>;
+};
+
+&sata2_port0 {
+ target-supply = <&hdd1_pwr>;
+};
--
2.47.2
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 4/4] arm64: dts: rockchip: add overlay for qnap-ts133 device revision
2026-02-01 19:18 [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
` (2 preceding siblings ...)
2026-02-01 19:18 ` [PATCH 3/4] arm64: dts: rockchip: add overlay for qnap-ts233 " Heiko Stuebner
@ 2026-02-01 19:18 ` Heiko Stuebner
2026-02-22 22:39 ` [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
4 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2026-02-01 19:18 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel
TS433 devices received a board revision adding gpios for per hard-disk
presence-detection and power-control. These boards have a PCB-id of at
least 13 which can be read from an EEPROM.
The presence detection is not really necessary and there are also no
existing bindings for doing something with it. So add them as gpio hog
to at least document them and allow its state to be read from debugfs.
The power-control is modelled as regulator, with connected to the
RK3568's SATA controller as target-supply.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 5 ++
.../rockchip/rk3566-qnap-ts133-pcb-13.dtso | 64 +++++++++++++++++++
2 files changed, 69 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index c5086aa9c427..40c5a75a2511 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -115,6 +115,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133-pcb-13.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb
@@ -247,6 +248,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb
rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \
rk3399-rockpro64-screen.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133-pcb-13.dtb
+rk3566-qnap-ts133-pcb-13-dtbs := rk3566-qnap-ts133.dtb \
+ rk3566-qnap-ts133-pcb-13.dtbo
+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtb
rk3568-qnap-ts233-pcb-12-11-dtbs := rk3568-qnap-ts233.dtb \
rk3568-qnap-ts233-pcb-12-11.dtbo
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso b/arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso
new file mode 100644
index 000000000000..f9a8194f5753
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for TS133 board PCB-13 revision.
+ *
+ * Copyright (C) 2025 Heiko Stuebner <heiko@sntech.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ /*
+ * The default hardware-state of this gpio causes the drive
+ * to be already running when entering the kernel.
+ * regulator-boot-on is needed to prevent one additional
+ * power-cycle on the drive.
+ *
+ * With regulator-boot-on we get the expected 1 cycle
+ * per boot, without it we end up with 2 cycles as seen
+ * via smartctl.
+ */
+ hdd1_pwr: regulator-hdd1-power {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_power_pin>;
+ regulator-name = "hdd1-power";
+ regulator-boot-on;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+&gpio2 {
+ hdd1-present-hog {
+ gpios = <RK_PA2 GPIO_ACTIVE_LOW>;
+ gpio-hog;
+ input;
+ line-name = "hdd1-present";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdd1_present_pin>;
+
+ hdd-power {
+ hdd1_power_pin: hdd1-power-pin {
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hdd-present {
+ hdd1_present_pin: hdd1-present-pin {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sata2_port0 {
+ target-supply = <&hdd1_pwr>;
+};
--
2.47.2
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 0/4] Revision overlays for QNAP TSx33 devices
2026-02-01 19:18 [PATCH 0/4] Revision overlays for QNAP TSx33 devices Heiko Stuebner
` (3 preceding siblings ...)
2026-02-01 19:18 ` [PATCH 4/4] arm64: dts: rockchip: add overlay for qnap-ts133 " Heiko Stuebner
@ 2026-02-22 22:39 ` Heiko Stuebner
4 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2026-02-22 22:39 UTC (permalink / raw)
To: Heiko Stuebner; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel
On Sun, 01 Feb 2026 20:18:00 +0100, Heiko Stuebner wrote:
> The QNAP NAS devices actually got device revisions at some point,
> so there are different board variants in the wild.
>
> Above certain PCB revisions, the devices gained additional GPIOs
> for controlling individual power to the sata ports and also could
> detect the presence via GPIOs.
>
> [...]
Applied, thanks!
[1/4] arm64: dts: rockchip: Add port subnodes to RK356x SATA controllers
commit: 5918bf2a17f4689abfb94d341c5240088f8bd16e
[2/4] arm64: dts: rockchip: add overlay for qnap-ts433 device revision
commit: 406c5515eb62fe6837fc1257855024b1ac6c52e1
[3/4] arm64: dts: rockchip: add overlay for qnap-ts233 device revision
commit: a12bd8d24f2f942a6684431af9f885b4a4ae84fe
[4/4] arm64: dts: rockchip: add overlay for qnap-ts133 device revision
commit: 5fdd6701fad197d0dfe21de3beed8ac45343aa73
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 6+ messages in thread