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* [PATCH] serial: amba-pl011: Enable UART in earlycon setup
@ 2026-02-10 12:50 Peter Maydell
  2026-02-10 13:22 ` Arnd Bergmann
  0 siblings, 1 reply; 4+ messages in thread
From: Peter Maydell @ 2026-02-10 12:50 UTC (permalink / raw)
  To: linux-serial
  Cc: linux-kernel, Greg Kroah-Hartman, Jiri Slaby, Thomas Gleixner,
	Arnd Bergmann, Russell King, Miaoqian Lin

Currently the PL011 driver only enables the UART (by setting UARTEN
in REG_CR) in pl011_startup(), so if it is used for earlycon it is
relying on the bootrom/firmware having left the UART enabled.

There's no particular reason not to actively enable the UART before
using it for earlycon, and the earlycon handling for e.g. the 8250
UART sets up the UART in its setup function, so follow that in the
PL011.

This allows use of earlycon with a UART that the firmware hasn't
already been using for its own output, but the main motivation is
that QEMU will otherwise log a message complaining that the guest is
trying to write to a UART it never enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
NB: I have tested this under QEMU, but I do not have any real
PL011-using hardware to hand to test with.
---
 drivers/tty/serial/amba-pl011.c | 35 ++++++++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 7f17d288c807..462a8c380059 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -2700,6 +2700,37 @@ static int pl011_early_read(struct console *con, char *s, unsigned int n)
  */
 static int __init pl011_early_console_setup(struct earlycon_device *device,
 					    const char *opt)
+{
+	unsigned int cr;
+
+	if (!device->port.membase)
+		return -ENODEV;
+
+	device->con->write = pl011_early_write;
+	device->con->read = pl011_early_read;
+
+	if (device->port.iotype == UPIO_MEM32)
+		cr = readl(device->port.membase + UART011_CR);
+	else
+		cr = readw(device->port.membase + UART011_CR);
+	cr &= UART011_CR_RTS | UART011_CR_DTR;
+	cr |= UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE;
+	if (device->port.iotype == UPIO_MEM32)
+		writel(cr, device->port.membase + UART011_CR);
+	else
+		writew(cr, device->port.membase + UART011_CR);
+
+	return 0;
+}
+
+OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
+
+/*
+ * The SBSA UART has no defined control register and is assumed to
+ * be pre-enabled by firmware, so we do not write to UART011_CR.
+ */
+static int __init sbsa_uart_early_console_setup(struct earlycon_device *device,
+						const char *opt)
 {
 	if (!device->port.membase)
 		return -ENODEV;
@@ -2710,9 +2741,7 @@ static int __init pl011_early_console_setup(struct earlycon_device *device,
 	return 0;
 }
 
-OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
-
-OF_EARLYCON_DECLARE(pl011, "arm,sbsa-uart", pl011_early_console_setup);
+OF_EARLYCON_DECLARE(pl011, "arm,sbsa-uart", sbsa_uart_early_console_setup);
 
 /*
  * On Qualcomm Datacenter Technologies QDF2400 SOCs affected by
-- 
2.43.0


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-02-10 14:11 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-02-10 12:50 [PATCH] serial: amba-pl011: Enable UART in earlycon setup Peter Maydell
2026-02-10 13:22 ` Arnd Bergmann
2026-02-10 13:49   ` Peter Maydell
2026-02-10 14:10     ` Arnd Bergmann

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