[PATCH 0/4] thermal: intel: Add support for Directed Package Thermal Interrupts

[PATCH 0/4] thermal: intel: Add support for Directed Package Thermal Interrupts

[Ricardo Neri]

Hi,

Package-level thermal interrupts are currently broadcast to all CPUs in a
package. Only one CPU is needed to service package-wide events. Moreover,
broadcasting may create resource contention. An example of this are thermal
interrupts posted for Hardware Feedback Interface[1] updates: all CPUs in
the package receive the interrupt and then race to grab a lock to update a
data structure common to all CPUs. Idle CPUs were needlessly woken up.

Newer Intel processors allow directing package-level thermal interrupts
only to CPUs that explicitly request them. A CPU opts in by setting bit 25
in IA32_THERM_INTERRUPT. Hardware acknowledges the request by setting bit 25
in IA32_PACKAGE_THERM_STATUS.

This series enables directed package thermal interrupts and designates one
handler CPU per package using the CPU hotplug infrastructure. A new CPU is
selected if the handler CPU goes offline.

Because CPU0's hotplug callbacks are not invoked during suspend and resume,
syscore callbacks are added to restore the handler for the boot package.
The series also disables directed delivery during kexec reboot, avoiding
stale interrupt routing when rebooting into a kernel that does not support
the feature.

[1]. Intel Software Developer's Manual Vol. 3, Section 17.6, Feb 2026

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Ricardo Neri (4):
      x86/thermal: Add bit definitions for Intel Directed Package Thermal Interrupt
      thermal: intel: Enable Directed Package-level Thermal Interrupts
      thermal: intel: Add syscore callbacks for suspend and resume
      thermal: intel: Add a syscore shutdown callback for kexec reboot

 arch/x86/include/asm/cpufeatures.h  |   1 +
 arch/x86/include/asm/msr-index.h    |   2 +
 drivers/thermal/intel/therm_throt.c | 223 +++++++++++++++++++++++++++++++++++-
 3 files changed, 225 insertions(+), 1 deletion(-)
---
base-commit: 1f318b96cc84d7c2ab792fcc0bfd42a7ca890681
change-id: 20260306-rneri-directed-therm-intr-9f3f8888bb3f

Best regards,
-- 
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>

[PATCH 1/4] x86/thermal: Add bit definitions for Intel Directed Package Thermal Interrupt

[Ricardo Neri]

Add CPUID and MSR bit definitions required to support Intel Directed
Package Thermal Interrupts.

A CPU requests directed package-level thermal interrupts by setting bit 25
in IA32_THERM_INTERRUPT. Hardware acknowledges by setting bit 25 in
IA32_PACKAGE_THERM_STATUS, indicating that only CPUs that opted in will
receive the interrupt. If no CPU in the package requests it, delivery
falls back to broadcast.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/include/asm/msr-index.h   | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index dbe104df339b..487bf9da0cef 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -364,6 +364,7 @@
 #define X86_FEATURE_HWP_PKG_REQ		(14*32+11) /* "hwp_pkg_req" HWP Package Level Request */
 #define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* HWP Highest perf change */
 #define X86_FEATURE_HFI			(14*32+19) /* "hfi" Hardware Feedback Interface */
+#define X86_FEATURE_DIRECTED_PKG_THRM_INTR (14*32+24) /* Intel Directed Package Thermal Interrupt */
 
 /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */
 #define X86_FEATURE_NPT			(15*32+ 0) /* "npt" Nested Page Table support */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 6673601246b3..aa1c652a9581 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -995,6 +995,7 @@
 #define THERM_INT_HIGH_ENABLE		(1 << 0)
 #define THERM_INT_LOW_ENABLE		(1 << 1)
 #define THERM_INT_PLN_ENABLE		(1 << 24)
+#define THERM_DIRECTED_INTR_ENABLE	(1 << 25)
 
 #define MSR_IA32_THERM_STATUS		0x0000019c
 
@@ -1024,6 +1025,7 @@
 
 #define PACKAGE_THERM_STATUS_PROCHOT		(1 << 0)
 #define PACKAGE_THERM_STATUS_POWER_LIMIT	(1 << 10)
+#define PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK	(1 << 25)
 #define PACKAGE_THERM_STATUS_HFI_UPDATED	(1 << 26)
 
 #define MSR_IA32_PACKAGE_THERM_INTERRUPT	0x000001b2

-- 
2.43.0

[PATCH 2/4] thermal: intel: Enable Directed Package-level Thermal Interrupts

[Ricardo Neri]

Package-level thermal interrupts are broadcast to all online CPUs within a
package, even though only one CPU needs to service them. This results in
unnecessary wakeups, lock contention, and corresponding performance and
power-efficiency penalties.

When supported by hardware, a CPU requests to receive directed package-
level thermal interrupts by setting bit 25 in IA32_THERM_INTERRUPT. The
operating system must then verify that hardware has acknowledged this
request by checking bit 25 in IA32_PACKAGE_THERM_STATUS.

Enable directed package-level thermal interrupts on one CPU per package.
Use the CPU hotplug infrastructure. Keep track of the CPUs handling
package-level interrupts with an array.

If the handling CPU goes offline, select a new CPU. Temporarily enable
directed interrupts on both the current and new CPU until hardware
acknowledges the new selection, then disable them on the outgoing CPU.

Systems without directed-interrupt support retain the current behavior:
all online CPUs in a package receive the interrupt and existing handlers
manage any resulting contention. Also fall back to this behavior if the
directed-interrupt acknowledgment fails during boot.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 drivers/thermal/intel/therm_throt.c | 178 +++++++++++++++++++++++++++++++++++-
 1 file changed, 177 insertions(+), 1 deletion(-)

diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/therm_throt.c
index 44fa4dd15dd1..456f2ac10e0c 100644
--- a/drivers/thermal/intel/therm_throt.c
+++ b/drivers/thermal/intel/therm_throt.c
@@ -20,6 +20,7 @@
 #include <linux/kernel.h>
 #include <linux/percpu.h>
 #include <linux/export.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/smp.h>
@@ -244,7 +245,7 @@ static void thermal_intr_init_pkg_clear_mask(void)
 	 * IA32_PACKAGE_THERM_STATUS.
 	 */
 
-	/* All bits except BIT 26 depend on CPUID.06H: EAX[6] = 1 */
+	/* All bits except BITs 25 and 26 depend on CPUID.06H: EAX[6] = 1 */
 	if (boot_cpu_has(X86_FEATURE_PTS))
 		therm_intr_pkg_clear_mask = (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11));
 
@@ -254,6 +255,13 @@ static void thermal_intr_init_pkg_clear_mask(void)
 	 */
 	if (boot_cpu_has(X86_FEATURE_HFI))
 		therm_intr_pkg_clear_mask |= BIT(26);
+
+	/*
+	 * Intel SDM Volume 2A: Thermal and Power Management Leaf
+	 * Bit 25: CPUID.06H: EAX[24] = 1
+	 */
+	if (boot_cpu_has(X86_FEATURE_DIRECTED_PKG_THRM_INTR))
+		therm_intr_pkg_clear_mask |= BIT(25);
 }
 
 /*
@@ -524,6 +532,151 @@ static void thermal_throttle_remove_dev(struct device *dev)
 	sysfs_remove_group(&dev->kobj, &thermal_attr_group);
 }
 
+static int check_directed_thermal_pkg_intr_ack(void)
+{
+	unsigned int count = 15000;
+	u64 msr_val;
+
+	/*
+	 * Hardware is known to acknowledge the setting of the directed
+	 * interrupt in 10ms or less. Wait for 15ms.
+	 */
+	do {
+		rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
+		udelay(1);
+	} while (!(msr_val & PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK) && --count);
+
+	if (!count)
+		return -ETIMEDOUT;
+
+	thermal_clear_package_intr_status(PACKAGE_LEVEL,
+					  PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK);
+
+	return 0;
+}
+
+static void config_directed_thermal_pkg_intr(void *info)
+{
+	bool enable = *((bool *)info);
+	u64 msr_val;
+
+	rdmsrl(MSR_IA32_THERM_INTERRUPT, msr_val);
+
+	if (enable)
+		msr_val |= THERM_DIRECTED_INTR_ENABLE;
+	else
+		msr_val &= ~THERM_DIRECTED_INTR_ENABLE;
+
+	wrmsrl(MSR_IA32_THERM_INTERRUPT, msr_val);
+}
+
+/* Only accessed from CPU hotplug operations. No extra locking needed. */
+static unsigned int *directed_intr_handler_cpus;
+
+static bool directed_thermal_pkg_intr_supported(unsigned int cpu)
+{
+	if (!boot_cpu_has(X86_FEATURE_DIRECTED_PKG_THRM_INTR))
+		return false;
+
+	if (!directed_intr_handler_cpus)
+		return false;
+
+	return true;
+}
+
+static void enable_directed_thermal_pkg_intr(unsigned int cpu)
+{
+	bool enable = true;
+	u16 pkg_id;
+
+	if (!directed_thermal_pkg_intr_supported(cpu))
+		return;
+
+	pkg_id = topology_logical_package_id(cpu);
+	if (pkg_id >= topology_max_packages())
+		return;
+
+	/* Another CPU in this package already handles the directed interrupt. */
+	if (directed_intr_handler_cpus[pkg_id] != nr_cpu_ids)
+		return;
+
+	thermal_clear_package_intr_status(PACKAGE_LEVEL,
+					  PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK);
+
+	config_directed_thermal_pkg_intr(&enable);
+	if (!check_directed_thermal_pkg_intr_ack()) {
+		directed_intr_handler_cpus[pkg_id] = cpu;
+		return;
+	}
+
+	/* Failed to enable the directed package interrupt. Roll back. */
+	enable = false;
+	config_directed_thermal_pkg_intr(&enable);
+
+	/*
+	 * This function is first called from the CPU0 hotplug callback during
+	 * boot. Disable the directed package interrupt. All CPUs in a package
+	 * will receive the package-level interrupt.
+	 */
+	if (cpu)
+		return;
+
+	pr_info_once("CPU0: Failed to enable directed package-level thermal interrupt\n");
+	kfree(directed_intr_handler_cpus);
+	directed_intr_handler_cpus = NULL;
+}
+
+static void disable_directed_thermal_pkg_intr(unsigned int cpu)
+{
+	unsigned int new_cpu;
+	bool enable;
+	u16 pkg_id;
+
+	if (!directed_thermal_pkg_intr_supported(cpu))
+		return;
+
+	pkg_id = topology_logical_package_id(cpu);
+	if (pkg_id >= topology_max_packages())
+		return;
+
+	/* Not the CPU handling the directed interrupt */
+	if (directed_intr_handler_cpus[pkg_id] != cpu)
+		return;
+
+	/* Redirect the interrupt to another online CPU in the package. */
+	new_cpu = cpumask_any_but(topology_core_cpumask(cpu), cpu);
+	if (new_cpu < nr_cpu_ids) {
+		enable = true;
+		thermal_clear_package_intr_status(PACKAGE_LEVEL,
+						  PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK);
+
+		smp_call_function_single(new_cpu, config_directed_thermal_pkg_intr,
+					 &enable, true);
+	}
+
+	/*
+	 * If a new CPU was found, check for acknowledgment. If hardware did not
+	 * acknowledge it, disable the redirection of the interrupt on the new CPU.
+	 * Since no other CPU is configured to receive the package-level interrupt,
+	 * all CPUs in the package will receive it.
+	 */
+	enable = false;
+	if (new_cpu < nr_cpu_ids && check_directed_thermal_pkg_intr_ack()) {
+		smp_call_function_single(new_cpu, config_directed_thermal_pkg_intr,
+					 &enable, true);
+		new_cpu = nr_cpu_ids;
+	}
+
+	/*
+	 * Disable the interrupt on this CPU. Hardware may acknowledge the
+	 * request, but we do not care in this case. We do need to clear the
+	 * ack bit when enabling the interrupt in another CPU.
+	 */
+	config_directed_thermal_pkg_intr(&enable);
+
+	directed_intr_handler_cpus[pkg_id] = new_cpu;
+}
+
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
 static int thermal_throttle_online(unsigned int cpu)
 {
@@ -548,6 +701,8 @@ static int thermal_throttle_online(unsigned int cpu)
 	l = apic_read(APIC_LVTTHMR);
 	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
 
+	enable_directed_thermal_pkg_intr(cpu);
+
 	return thermal_throttle_add_dev(dev, cpu);
 }
 
@@ -557,6 +712,8 @@ static int thermal_throttle_offline(unsigned int cpu)
 	struct device *dev = get_cpu_device(cpu);
 	u32 l;
 
+	disable_directed_thermal_pkg_intr(cpu);
+
 	/* Mask the thermal vector before draining evtl. pending work */
 	l = apic_read(APIC_LVTTHMR);
 	apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED);
@@ -573,6 +730,23 @@ static int thermal_throttle_offline(unsigned int cpu)
 	return 0;
 }
 
+static __init void init_directed_pkg_intr(void)
+{
+	int i;
+
+	if (!boot_cpu_has(X86_FEATURE_DIRECTED_PKG_THRM_INTR))
+		return;
+
+	directed_intr_handler_cpus = kmalloc_array(topology_max_packages(),
+						   sizeof(*directed_intr_handler_cpus),
+						   GFP_KERNEL);
+	if (!directed_intr_handler_cpus)
+		return;
+
+	for (i = 0; i < topology_max_packages(); i++)
+		directed_intr_handler_cpus[i] = nr_cpu_ids;
+}
+
 static __init int thermal_throttle_init_device(void)
 {
 	int ret;
@@ -580,6 +754,8 @@ static __init int thermal_throttle_init_device(void)
 	if (!atomic_read(&therm_throt_en))
 		return 0;
 
+	init_directed_pkg_intr();
+
 	intel_hfi_init();
 
 	ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/therm:online",

-- 
2.43.0

[PATCH 3/4] thermal: intel: Add syscore callbacks for suspend and resume

[Ricardo Neri]

Directed package-level thermal interrupts are serviced by a single CPU per
package. These handler CPUs are selected at boot through the CPU hotplug
infrastructure. This mechanism is sufficient to restore the directed
interrupt configuration when resuming from suspend.

For the boot package, CPU0 is chosen during boot because its CPU hotplug
online callback runs first. However, this callback is not invoked on
resume. The directed package-level interrupt configuration for the boot
package is not restored automatically. Add a syscore .resume callback to
re-enable directed package-level interrupts for this package.

Disabling directed interrupts during suspend is not strictly required, but
doing so keeps the handler-tracking array in a consistent state. It allows
the correct configuration to be restored on resume.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 drivers/thermal/intel/therm_throt.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/therm_throt.c
index 456f2ac10e0c..c89485a8cda0 100644
--- a/drivers/thermal/intel/therm_throt.c
+++ b/drivers/thermal/intel/therm_throt.c
@@ -14,6 +14,7 @@
  * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
  *          Inspired by Ross Biro's and Al Borchers' counter code.
  */
+#include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/notifier.h>
 #include <linux/jiffies.h>
@@ -730,6 +731,32 @@ static int thermal_throttle_offline(unsigned int cpu)
 	return 0;
 }
 
+static void directed_pkg_intr_syscore_resume(void *data)
+{
+	/* We resume from the suspend on CPU0. */
+	enable_directed_thermal_pkg_intr(0);
+}
+
+static int directed_pkg_intr_syscore_suspend(void *data)
+{
+	/*
+	 * We suspend from CPU0. The interrupt will not be redirected since all
+	 * CPUs in the package are offline at this point.
+	 */
+	disable_directed_thermal_pkg_intr(0);
+
+	return 0;
+}
+
+static struct syscore_ops directed_pkg_intr_pm_ops = {
+	.resume = directed_pkg_intr_syscore_resume,
+	.suspend = directed_pkg_intr_syscore_suspend,
+};
+
+static struct syscore directed_pkg_intr_pm = {
+	.ops = &directed_pkg_intr_pm_ops,
+};
+
 static __init void init_directed_pkg_intr(void)
 {
 	int i;
@@ -745,6 +772,8 @@ static __init void init_directed_pkg_intr(void)
 
 	for (i = 0; i < topology_max_packages(); i++)
 		directed_intr_handler_cpus[i] = nr_cpu_ids;
+
+	register_syscore(&directed_pkg_intr_pm);
 }
 
 static __init int thermal_throttle_init_device(void)

-- 
2.43.0

[PATCH 4/4] thermal: intel: Add a syscore shutdown callback for kexec reboot

[Ricardo Neri]

A kexec reboot may load a kernel that does not support directed package-
level thermal interrupts. Without a shutdown callback, the directed
interrupt configuration remains enabled across kexec but will not be
handled correctly. In particular, if the CPU designated to receive the
directed interrupt goes offline, no other CPU in the package will receive
it.

Add a syscore .shutdown callback to disable directed package-level thermal
interrupts on all packages before a kexec reboot. If the post-kexec kernel
does not enable directed interrupts, they will fall back to being broadcast
to all CPUs in the package.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 drivers/thermal/intel/therm_throt.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/therm_throt.c
index c89485a8cda0..33b0c90cfe41 100644
--- a/drivers/thermal/intel/therm_throt.c
+++ b/drivers/thermal/intel/therm_throt.c
@@ -748,9 +748,25 @@ static int directed_pkg_intr_syscore_suspend(void *data)
 	return 0;
 }
 
+static void directed_pkg_intr_syscore_shutdown(void *data)
+{
+	bool enable = false;
+	int i;
+
+	for (i = 0; i < topology_max_packages(); i++) {
+		if (directed_intr_handler_cpus[i] == nr_cpu_ids)
+			continue;
+
+		smp_call_function_single(directed_intr_handler_cpus[i],
+					 config_directed_thermal_pkg_intr,
+					 &enable, true);
+	}
+}
+
 static struct syscore_ops directed_pkg_intr_pm_ops = {
 	.resume = directed_pkg_intr_syscore_resume,
 	.suspend = directed_pkg_intr_syscore_suspend,
+	.shutdown = directed_pkg_intr_syscore_shutdown,
 };
 
 static struct syscore directed_pkg_intr_pm = {

-- 
2.43.0

Re: [PATCH 1/4] x86/thermal: Add bit definitions for Intel Directed Package Thermal Interrupt

[Borislav Petkov]

On Mon, Mar 09, 2026 at 03:19:24PM -0700, Ricardo Neri wrote:
> Add CPUID and MSR bit definitions required to support Intel Directed
> Package Thermal Interrupts.
> 
> A CPU requests directed package-level thermal interrupts by setting bit 25
> in IA32_THERM_INTERRUPT. Hardware acknowledges by setting bit 25 in
> IA32_PACKAGE_THERM_STATUS, indicating that only CPUs that opted in will
> receive the interrupt. If no CPU in the package requests it, delivery
> falls back to broadcast.
> 
> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> ---
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/include/asm/msr-index.h   | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index dbe104df339b..487bf9da0cef 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -364,6 +364,7 @@
>  #define X86_FEATURE_HWP_PKG_REQ		(14*32+11) /* "hwp_pkg_req" HWP Package Level Request */
>  #define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* HWP Highest perf change */
>  #define X86_FEATURE_HFI			(14*32+19) /* "hfi" Hardware Feedback Interface */

Leave a space here to denote there's a hole

> +#define X86_FEATURE_DIRECTED_PKG_THRM_INTR (14*32+24) /* Intel Directed Package Thermal Interrupt */

Also, can we agree on one naming and stick to it?

What you have there basically screams "OMG, I am trying to say *everything*
in that single define name but there's no room." :)

Also, the defines you have here are all a little bit different and good luck
matching what is what in a couple of months.

So, how about

#define X86_FEATURE_DPTI	 (14*32+24) /* Intel Directed Package Thermal Interrupt */

and the comment explains what the acronym is?

>  /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */
>  #define X86_FEATURE_NPT			(15*32+ 0) /* "npt" Nested Page Table support */
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index 6673601246b3..aa1c652a9581 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -995,6 +995,7 @@
>  #define THERM_INT_HIGH_ENABLE		(1 << 0)
>  #define THERM_INT_LOW_ENABLE		(1 << 1)
>  #define THERM_INT_PLN_ENABLE		(1 << 24)
> +#define THERM_DIRECTED_INTR_ENABLE	(1 << 25)

And then you can do:

#define DPTI_ENABLE	(1 << 25)

>  
>  #define MSR_IA32_THERM_STATUS		0x0000019c
>  
> @@ -1024,6 +1025,7 @@
>  
>  #define PACKAGE_THERM_STATUS_PROCHOT		(1 << 0)
>  #define PACKAGE_THERM_STATUS_POWER_LIMIT	(1 << 10)
> +#define PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK	(1 << 25)

Ditto here:

	DPTI_ACK

And you can always add comments explaining the acronym...

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 1/4] x86/thermal: Add bit definitions for Intel Directed Package Thermal Interrupt

[Ricardo Neri]

On Tue, Mar 10, 2026 at 10:35:30AM +0100, Borislav Petkov wrote:
> On Mon, Mar 09, 2026 at 03:19:24PM -0700, Ricardo Neri wrote:
> > Add CPUID and MSR bit definitions required to support Intel Directed
> > Package Thermal Interrupts.
> > 
> > A CPU requests directed package-level thermal interrupts by setting bit 25
> > in IA32_THERM_INTERRUPT. Hardware acknowledges by setting bit 25 in
> > IA32_PACKAGE_THERM_STATUS, indicating that only CPUs that opted in will
> > receive the interrupt. If no CPU in the package requests it, delivery
> > falls back to broadcast.
> > 
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> > ---
> >  arch/x86/include/asm/cpufeatures.h | 1 +
> >  arch/x86/include/asm/msr-index.h   | 2 ++
> >  2 files changed, 3 insertions(+)
> > 
> > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> > index dbe104df339b..487bf9da0cef 100644
> > --- a/arch/x86/include/asm/cpufeatures.h
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -364,6 +364,7 @@
> >  #define X86_FEATURE_HWP_PKG_REQ		(14*32+11) /* "hwp_pkg_req" HWP Package Level Request */
> >  #define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* HWP Highest perf change */

Thank you very much for your comments, Boris!

> >  #define X86_FEATURE_HFI			(14*32+19) /* "hfi" Hardware Feedback Interface */
> 
> Leave a space here to denote there's a hole

Sure.

> 
> > +#define X86_FEATURE_DIRECTED_PKG_THRM_INTR (14*32+24) /* Intel Directed Package Thermal Interrupt */
> 
> Also, can we agree on one naming and stick to it?
> 
> What you have there basically screams "OMG, I am trying to say *everything*
> in that single define name but there's no room." :)

Indeed, I had the feeling.

> 
> Also, the defines you have here are all a little bit different and good luck
> matching what is what in a couple of months.
> 
> So, how about
> 
> #define X86_FEATURE_DPTI	 (14*32+24) /* Intel Directed Package Thermal Interrupt */
> 
> and the comment explains what the acronym is?

Sure, I will take your suggestion.

> 
> >  /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */
> >  #define X86_FEATURE_NPT			(15*32+ 0) /* "npt" Nested Page Table support */
> > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> > index 6673601246b3..aa1c652a9581 100644
> > --- a/arch/x86/include/asm/msr-index.h
> > +++ b/arch/x86/include/asm/msr-index.h
> > @@ -995,6 +995,7 @@
> >  #define THERM_INT_HIGH_ENABLE		(1 << 0)
> >  #define THERM_INT_LOW_ENABLE		(1 << 1)
> >  #define THERM_INT_PLN_ENABLE		(1 << 24)
> > +#define THERM_DIRECTED_INTR_ENABLE	(1 << 25)
> 
> And then you can do:
> 
> #define DPTI_ENABLE	(1 << 25)

Would it be OK to name it THERM_DPTI_ENABLE? It would be more consistent
with the naming of the other bits.

> 
> >  
> >  #define MSR_IA32_THERM_STATUS		0x0000019c
> >  
> > @@ -1024,6 +1025,7 @@
> >  
> >  #define PACKAGE_THERM_STATUS_PROCHOT		(1 << 0)
> >  #define PACKAGE_THERM_STATUS_POWER_LIMIT	(1 << 10)
> > +#define PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK	(1 << 25)
> 
> Ditto here:
> 
> 	DPTI_ACK

Same here, would it be OK to name it PACKAGE_THERM_DPTI_ACK for consistency
with other bits' names?

> 
> And you can always add comments explaining the acronym...

Sure.

Thanks and BR,
Ricardo