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* [PATCH] arm64: dts: s32g: force S32G RTC as rtc0
@ 2026-03-10 12:49 Andrei Botila
  2026-03-10 13:14 ` Fabio Estevam
  0 siblings, 1 reply; 6+ messages in thread
From: Andrei Botila @ 2026-03-10 12:49 UTC (permalink / raw)
  To: Frank Li, Sascha Hauer, Conor Dooley, Rob Herring,
	Krzysztof Kozlowski, Ghennadi Procopciuc
  Cc: NXP S32 Linux Team, Chester Lin, Matthias Brugger,
	Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel, imx,
	devicetree, linux-kernel, Andrei Botila

S32G RTC is probed after the RTC on RDB (PCA85073A) so the S32G RTC
ends up on /dev/rtc1. This causes the suspend/resume or hwclock to use
the wrong RTC since it takes by default rtc0.
Force the S32G RTC to be assigned rtc0.

Signed-off-by: Andrei Botila <andrei.botila@oss.nxp.com>
---
 arch/arm64/boot/dts/freescale/s32g2.dtsi        | 4 ++++
 arch/arm64/boot/dts/freescale/s32g3.dtsi        | 4 ++++
 arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi | 6 ++++++
 3 files changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 51d00dac12de..d538876f3854 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -14,6 +14,10 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		rtc0 = &rtc0;
+	};
+
 	reserved-memory  {
 		#address-cells = <2>;
 		#size-cells = <2>;
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index e314f3c7d61d..713c75c63f94 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -15,6 +15,10 @@ / {
 	#address-cells = <0x02>;
 	#size-cells = <0x02>;
 
+	aliases {
+		rtc0 = &rtc0;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
index 979868f6d2c5..e3e83923b10e 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
@@ -7,6 +7,12 @@
  *          Larisa Grigore <larisa.grigore@nxp.com>
  */
 
+/ {
+	aliases {
+		rtc1 = &pca85073a;
+	};
+};
+
 &pinctrl {
 	can0_pins: can0-pins {
 		can0-grp0 {
-- 
2.52.0


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2026-03-10 16:03 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-03-10 12:49 [PATCH] arm64: dts: s32g: force S32G RTC as rtc0 Andrei Botila
2026-03-10 13:14 ` Fabio Estevam
2026-03-10 13:49   ` Andrei Botila
2026-03-10 14:02     ` Fabio Estevam
2026-03-10 15:21       ` Andrei Botila
2026-03-10 16:03         ` Fabio Estevam

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