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From: j0sh1x <aljoshua.hell@gmail.com>
To: tglx@kernel.org
Cc: linux-kernel@vger.kernel.org, subsystem@vger.kernel.org,
	dominikkobinski314@gmail.com, j0sh1x <aljoshua.hell@gmail.com>
Subject: [PATCH 1/5] dt-bindings: irq: Add Qualcomm MSM VIC binding
Date: Sun, 15 Mar 2026 12:17:01 +0100	[thread overview]
Message-ID: <20260315111705.118544-1-aljoshua.hell@gmail.com> (raw)

Signed-off-by: j0sh1x <aljoshua.hell@gmail.com>
---
 .../interrupt-controller/qcom,msm-vic.yaml    | 72 +++++++++++++++++++
 1 file changed, 72 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,msm-vic.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,msm-vic.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,msm-vic.yaml
new file mode 100644
index 000000000000..5bf281f72fe0
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,msm-vic.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0
+# qualcomm,msm-vic.yaml - Device Tree binding for Qualcomm MSM VIC interrupt controller
+
+description: >
+  Qualcomm MSM VIC (Vector Interrupt Controller). This interrupt controller
+  handles normal and wakeup interrupts and supports mapping to the
+  Qualcomm SMSM system.
+
+compatible: ["qcom,msm-vic"]
+
+properties:
+  interrupt-controller:
+    description: "Identifies this node as an interrupt controller"
+    required: true
+    type: boolean
+
+  #interrupt-cells:
+    description: "Specifies the number of cells needed to encode an interrupt"
+    required: true
+    type: integer
+    default: 1
+
+  reg:
+    description: "Base address and size of the VIC registers"
+    required: true
+    type: reg
+
+  num-irqs:
+    description: "Total number of interrupts supported by this VIC"
+    required: true
+    type: integer
+
+  num-gpio-irqs:
+    description: "Number of GPIO interrupts routed through this VIC"
+    required: true
+    type: integer
+
+  vic-num-regs:
+    description: "Number of VIC register banks"
+    required: true
+    type: integer
+
+  irq-mapping:
+    description:
+      Mapping of VIC IRQ numbers to SMSM wakeup channels. Each mapping
+      consists of two integers: <VIC IRQ> <SMSM channel>.  
+      "SMSM_FAKE_IRQ" can be used for virtual/fake wakeup interrupts.
+    required: true
+    type: list
+    items:
+      - vic-irq: integer
+        smsm-channel: integer
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/qcom-vic.h>
+    intc: interrupt-controller@ac000000 {
+        compatible = "qcom,msm-vic";
+        interrupt-controller;
+        #interrupt-cells = <1>;
+        reg = <0xac000000 0x1000>;
+        num-irqs = <64>;
+        num-gpio-irqs = <165>;
+        vic-num-regs = <2>;
+        irq-mapping = <
+            17 1   /* INT_MDDI_EXT -> SMSM 1 */
+            16 2   /* INT_MDDI_PRI -> SMSM 2 */
+            18 3   /* INT_MDDI_CLIENT -> SMSM 3 */
+            15 4   /* INT_USB_OTG -> SMSM 4 */
+            0 SMSM_FAKE_IRQ   /* INT_A9_M2A_0 -> SMSM_FAKE_IRQ */
+        >;
+    }
\ No newline at end of file
-- 
2.51.0


             reply	other threads:[~2026-03-15 11:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-15 11:17 j0sh1x [this message]
2026-03-15 11:17 ` [PATCH 2/5] irqchip: Add Qualcomm MSM VIC driver j0sh1x
2026-03-16  8:30   ` Krzysztof Kozlowski
2026-03-20  9:51   ` Thomas Gleixner
2026-03-15 11:17 ` [PATCH 3/5] irqchip: Add Kconfig and Makefile entries for MSM VIC j0sh1x
2026-03-30  4:45   ` kernel test robot
2026-03-30  9:04   ` kernel test robot
2026-03-15 11:17 ` [PATCH 4/5] dt-bindings: irq: Add Qualcomm MSM VIC header j0sh1x
2026-03-16  8:30   ` Krzysztof Kozlowski
2026-03-15 11:17 ` [PATCH 5/5] MAINTAINERS: Add Maintainer entry for MSM VIC j0sh1x
2026-03-16  8:29 ` [PATCH 1/5] dt-bindings: irq: Add Qualcomm MSM VIC binding Krzysztof Kozlowski
2026-03-16 17:56   ` Krzysztof Kozlowski

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