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From: "Rob Herring (Arm)" <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Liviu Dudau <liviu.dudau@arm.com>,
	 Sudeep Holla <sudeep.holla@kernel.org>,
	 Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Frazer Carsley <frazer.carsley@arm.com>,
	 Hugues Kamba Mpiana <hugues.kambampiana@arm.com>,
	 Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/5] dt-bindings: arm,corstone1000: Add "arm,corstone1000-a320-fvp"
Date: Fri, 20 Mar 2026 11:47:14 -0500	[thread overview]
Message-ID: <20260320-dt-corstone1000-a320-v1-1-a549dfcfe8da@kernel.org> (raw)
In-Reply-To: <20260320-dt-corstone1000-a320-v1-0-a549dfcfe8da@kernel.org>

The Arm Corstone1000-A320 is a variation of the Corstone1000 with
Cortex-A320 cores and an Ethos-U85 NPU. An FVP for the platform is
available here[1].

[1] https://developer.arm.com/Tools%20and%20Software/Fixed%20Virtual%20Platforms/IoT%20FVPs

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 .../devicetree/bindings/arm/arm,corstone1000.yaml         | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml b/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml
index cff1cdaadb13..48ab3356e383 100644
--- a/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml
@@ -15,11 +15,11 @@ description: |+
   provides a flexible compute architecture that combines Cortex‑A and Cortex‑M
   processors.
 
-  Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
-  systems for M-Class (or other) processors for adding sensors, connectivity,
-  video, audio and machine learning at the edge System and security IPs to build
-  a secure SoC for a range of rich IoT applications, for example gateways, smart
-  cameras and embedded systems.
+  Support for Cortex‑A32, Cortex‑A35, Cortex‑A53 and Cortex-A320 processors.
+  Two expansion systems for M-Class (or other) processors for adding sensors,
+  connectivity, video, audio and machine learning at the edge System and
+  security IPs to build a secure SoC for a range of rich IoT applications, for
+  example gateways, smart cameras and embedded systems.
 
   Integrated Secure Enclave providing hardware Root of Trust and supporting
   seamless integration of the optional CryptoCell™-312 cryptographic
@@ -39,6 +39,11 @@ properties:
           implementation of this system. See ARM ecosystems FVP's.
         items:
           - const: arm,corstone1000-fvp
+      - description: Corstone1000-A320 FVP is the Fixed Virtual Platform
+          implementation of this system with Cortex-A320 cores and Ethos-U85
+          NPU. See ARM ecosystems FVP's.
+        items:
+          - const: arm,corstone1000-a320-fvp
 
 additionalProperties: true
 

-- 
2.51.0


  reply	other threads:[~2026-03-20 16:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-20 16:47 [PATCH 0/5] arm64: dts: Add Corstone1000-A320 platform Rob Herring (Arm)
2026-03-20 16:47 ` Rob Herring (Arm) [this message]
2026-03-21 10:05   ` [PATCH 1/5] dt-bindings: arm,corstone1000: Add "arm,corstone1000-a320-fvp" Krzysztof Kozlowski
2026-03-20 16:47 ` [PATCH 2/5] dt-bindings: npu: arm,ethos: Add "arm,corstone1000-ethos-u85" Rob Herring (Arm)
2026-03-21 10:06   ` Krzysztof Kozlowski
2026-03-20 16:47 ` [PATCH 3/5] arm64: dts: arm/corstone1000: Move cpu nodes Rob Herring (Arm)
2026-03-20 16:47 ` [PATCH 4/5] arm64: dts: arm/corstone1000: Move FVP peripherals to separate .dtsi Rob Herring (Arm)
2026-03-20 16:47 ` [PATCH 5/5] arm64: dts: arm/corstone1000: Add corstone-1000-a320 Rob Herring (Arm)
2026-03-24  7:31 ` [PATCH 0/5] arm64: dts: Add Corstone1000-A320 platform Sudeep Holla

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