[PATCH] arm64: qcom: Reenable PCIe L0s on the Qualcomm X1E80100

[PATCH] arm64: qcom: Reenable PCIe L0s on the Qualcomm X1E80100

[Daniel J Blueman]

During early platform launch, PCIe L0s was disabled on the Snapdragon X1
citing the PCIe phy "not being tuned for L0s":
https://lore.kernel.org/all/20241101030902.579789-5-quic_qianyu@quicinc.com/

With newer firmware, L0s is working without issue and moreover isn't
disabled under Windows 11.

Reenable this conservatively by using the same ops struct to bring the
powersaving benefit to Linux. Tested on Lenovo Slim 7x with Qualcomm
WCN785x PCIe WiFi which advertises and uses L0s.

Signed-off-by: Daniel J Blueman <daniel@quora.org>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 67a16af69ddc..5ecb64ca9525 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1500,6 +1500,10 @@ static const struct qcom_pcie_cfg cfg_sc8280xp = {
 	.no_l0s = true,
 };
 
+static const struct qcom_pcie_cfg cfg_x1e80100 = {
+	.ops = &ops_1_21_0,
+};
+
 static const struct qcom_pcie_cfg cfg_fw_managed = {
 	.firmware_managed = true,
 };
@@ -2142,7 +2146,7 @@ static const struct of_device_id qcom_pcie_match[] = {
 	{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 },
 	{ .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 },
 	{ .compatible = "qcom,pcie-sm8550", .data = &cfg_1_9_0 },
-	{ .compatible = "qcom,pcie-x1e80100", .data = &cfg_sc8280xp },
+	{ .compatible = "qcom,pcie-x1e80100", .data = &cfg_x1e80100 },
 	{ }
 };
 
-- 
2.53.0