* [PATCH] dt-bindings: fpga: altr,a10-pr-ip: convert to DT schema
@ 2026-05-12 18:02 Manish Baing
2026-05-15 9:03 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Manish Baing @ 2026-05-12 18:02 UTC (permalink / raw)
To: mdf, yilun.xu, robh, krzk+dt, conor+dt
Cc: matthew.gerlach, trix, linux-fpga, devicetree, linux-kernel,
manishbaing2789
Convert the Altera Arria 10 Partial Reconfiguration IP bindings
from text format to YAML schema.
Signed-off-by: Manish Baing <manishbaing2789@gmail.com>
---
.../devicetree/bindings/fpga/altera-pr-ip.txt | 12 -------
.../bindings/fpga/altr,a10-pr-ip.yaml | 34 +++++++++++++++++++
2 files changed, 34 insertions(+), 12 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
create mode 100644 Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml
diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
deleted file mode 100644
index 52a294cf2730..000000000000
--- a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-Altera Arria10 Partial Reconfiguration IP
-
-Required properties:
-- compatible : should contain "altr,a10-pr-ip"
-- reg : base address and size for memory mapped io.
-
-Example:
-
- fpga_mgr: fpga-mgr@ff20c000 {
- compatible = "altr,a10-pr-ip";
- reg = <0xff20c000 0x10>;
- };
diff --git a/Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml b/Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml
new file mode 100644
index 000000000000..1f4df40308bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/altr,a10-pr-ip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera Arria10 Partial Reconfiguration IP
+
+maintainers:
+ - Matthew Gerlach <matthew.gerlach@linux.intel.com>
+
+description:
+ The Altera Arria 10 Partial Reconfiguration IP core allows the host
+ processor to perform partial reconfiguration of the FPGA fabric.
+
+properties:
+ compatible:
+ const: altr,a10-pr-ip
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ fpga-mgr@ff20c000 {
+ compatible = "altr,a10-pr-ip";
+ reg = <0xff20c000 0x10>;
+ };
--
2.43.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: fpga: altr,a10-pr-ip: convert to DT schema
2026-05-12 18:02 [PATCH] dt-bindings: fpga: altr,a10-pr-ip: convert to DT schema Manish Baing
@ 2026-05-15 9:03 ` Krzysztof Kozlowski
2026-05-18 14:45 ` Xu Yilun
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2026-05-15 9:03 UTC (permalink / raw)
To: Manish Baing
Cc: mdf, yilun.xu, robh, krzk+dt, conor+dt, matthew.gerlach, trix,
linux-fpga, devicetree, linux-kernel
On Tue, May 12, 2026 at 06:02:25PM +0000, Manish Baing wrote:
> Convert the Altera Arria 10 Partial Reconfiguration IP bindings
> from text format to YAML schema.
>
> Signed-off-by: Manish Baing <manishbaing2789@gmail.com>
> ---
> .../devicetree/bindings/fpga/altera-pr-ip.txt | 12 -------
> .../bindings/fpga/altr,a10-pr-ip.yaml | 34 +++++++++++++++++++
> 2 files changed, 34 insertions(+), 12 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
> create mode 100644 Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: fpga: altr,a10-pr-ip: convert to DT schema
2026-05-15 9:03 ` Krzysztof Kozlowski
@ 2026-05-18 14:45 ` Xu Yilun
0 siblings, 0 replies; 3+ messages in thread
From: Xu Yilun @ 2026-05-18 14:45 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Manish Baing, mdf, yilun.xu, robh, krzk+dt, conor+dt,
matthew.gerlach, trix, linux-fpga, devicetree, linux-kernel
On Fri, May 15, 2026 at 11:03:17AM +0200, Krzysztof Kozlowski wrote:
> On Tue, May 12, 2026 at 06:02:25PM +0000, Manish Baing wrote:
> > Convert the Altera Arria 10 Partial Reconfiguration IP bindings
> > from text format to YAML schema.
> >
> > Signed-off-by: Manish Baing <manishbaing2789@gmail.com>
> > ---
> > .../devicetree/bindings/fpga/altera-pr-ip.txt | 12 -------
> > .../bindings/fpga/altr,a10-pr-ip.yaml | 34 +++++++++++++++++++
> > 2 files changed, 34 insertions(+), 12 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
> > create mode 100644 Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Applied to for-next
>
> Best regards,
> Krzysztof
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-05-12 18:02 [PATCH] dt-bindings: fpga: altr,a10-pr-ip: convert to DT schema Manish Baing
2026-05-15 9:03 ` Krzysztof Kozlowski
2026-05-18 14:45 ` Xu Yilun
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