* [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
[not found] <20260529113338.984301-1-can.guo@oss.qualcomm.com>
@ 2026-05-29 11:33 ` Can Guo
2026-05-29 16:58 ` Krzysztof Kozlowski
2026-05-29 11:33 ` [PATCH v6 2/2] scsi: ufs: core: Add support for static TX Equalization settings Can Guo
1 sibling, 1 reply; 11+ messages in thread
From: Can Guo @ 2026-05-29 11:33 UTC (permalink / raw)
To: bvanassche, beanhuo, peter.wang, martin.petersen, mani
Cc: linux-scsi, Can Guo, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
and M-PHY v6.0. In these specs, TX Equalization is defined for all High
Speed Gears (not only HS-G6) to compensate channel loss and improve signal
integrity at high speed operation.
For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
required depending on channel characteristics.
Add vendor-neutral DT properties:
- patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
- fixed property tx-precode-enable-g6
Each property is a uint32 array of per-lane tuples:
<Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values
are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Bean Huo <beanhuo@micron.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
---
.../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
index ed97f5682509..d90cf25adfa5 100644
--- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
@@ -105,6 +105,51 @@ properties:
Restricts the UFS controller to rate-a or rate-b for both TX and
RX directions.
+ tx-precode-enable-g6:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ oneOf:
+ - minItems: 2
+ maxItems: 2
+ - minItems: 4
+ maxItems: 4
+ items:
+ enum: [0, 1]
+ description: |
+ Static TX Precode enable values for HS-G6 only.
+ Values are specified as per-lane tuples:
+ <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
+
+patternProperties:
+ "^txeq-preshoot-g[1-6]$":
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ oneOf:
+ - minItems: 2
+ maxItems: 2
+ - minItems: 4
+ maxItems: 4
+ items:
+ minimum: 0
+ maximum: 7
+ description: |
+ Static TX Equalization PreShoot values for High Speed Gears.
+ Values are specified as per-lane tuples:
+ <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
+
+ "^txeq-deemphasis-g[1-6]$":
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ oneOf:
+ - minItems: 2
+ maxItems: 2
+ - minItems: 4
+ maxItems: 4
+ items:
+ minimum: 0
+ maximum: 7
+ description: |
+ Static TX Equalization DeEmphasis values for High Speed Gears.
+ Values are specified as per-lane tuples:
+ <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
+
dependencies:
freq-table-hz: [ clocks ]
operating-points-v2: [ clocks, clock-names ]
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v6 2/2] scsi: ufs: core: Add support for static TX Equalization settings
[not found] <20260529113338.984301-1-can.guo@oss.qualcomm.com>
2026-05-29 11:33 ` [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo
@ 2026-05-29 11:33 ` Can Guo
2026-05-29 17:52 ` Manivannan Sadhasivam
1 sibling, 1 reply; 11+ messages in thread
From: Can Guo @ 2026-05-29 11:33 UTC (permalink / raw)
To: bvanassche, beanhuo, peter.wang, martin.petersen, mani
Cc: linux-scsi, Can Guo, Alim Akhtar, Avri Altman,
James E.J. Bottomley, Nitin Rawat, Ram Kumar Dwivedi, open list
Static TX Equalization settings and TX Precode enable indication from DT
properties txeq-preshoot-g[1-6], txeq-deemphasis-g[1-6], and
tx-precode-enable-g6 are board-specific baseline values. Values are
provided as per-lane tuples:
<Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
Parse DT u32 properties with explicit range checks by using
of_property_count_u32_elems()/of_property_read_u32_array().
When adaptive TX Equalization is used, these static settings are not final:
- If valid settings are retrieved from qTxEQGnSettings/wTxEQGnSettingsExt,
those retrieved settings override static DT settings.
- If retrieval is not available/valid, TX EQTR runs and trained settings
override static DT settings.
So static DT settings are a fallback and are intended for cases where
adaptive TX Equalization is not enabled/used. Adaptive TX Equalization
remains the primary path when enabled.
No behavior changes for platforms that do not provide these properties.
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
---
drivers/ufs/core/ufs-txeq.c | 10 ++-
drivers/ufs/host/ufshcd-pltfrm.c | 139 +++++++++++++++++++++++++++++++
include/ufs/ufshcd.h | 2 +
3 files changed, 150 insertions(+), 1 deletion(-)
diff --git a/drivers/ufs/core/ufs-txeq.c b/drivers/ufs/core/ufs-txeq.c
index 4b264adfdf49..b645fe5f6d95 100644
--- a/drivers/ufs/core/ufs-txeq.c
+++ b/drivers/ufs/core/ufs-txeq.c
@@ -1297,7 +1297,13 @@ int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
}
params = &hba->tx_eq_params[gear - 1];
- if (!params->is_valid || force_tx_eqtr) {
+ /*
+ * TX EQTR must run for the following cases:
+ * 1. TX EQ settings are invalid.
+ * 2. TX EQ settings are valid but static, i.e., populated from DT.
+ * 3. TX EQTR procedure is forced.
+ */
+ if (!params->is_valid || params->is_static || force_tx_eqtr) {
int ret;
ret = ufshcd_tx_eqtr(hba, params, pwr_mode);
@@ -1310,6 +1316,7 @@ int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
/* Mark TX Equalization settings as valid */
params->is_valid = true;
params->is_trained = true;
+ params->is_static = false;
params->is_applied = false;
}
@@ -1495,6 +1502,7 @@ static void ufshcd_extract_tx_eq_settings_attrs(struct ufs_hba *hba, u8 gear)
}
params->is_valid = true;
+ params->is_static = false;
}
void ufshcd_retrieve_tx_eq_settings(struct ufs_hba *hba)
diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c
index c2dafb583cf5..fc6aa91b6210 100644
--- a/drivers/ufs/host/ufshcd-pltfrm.c
+++ b/drivers/ufs/host/ufshcd-pltfrm.c
@@ -210,6 +210,143 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
}
}
+/**
+ * ufshcd_parse_tx_eq_settings_for_gear - Parse static TX EQ DT settings for one gear
+ * @hba: per adapter instance
+ * @gear: target HS gear
+ * @num_elems: expected number of elements per property
+ *
+ * Reads the txeq-preshoot-gN, txeq-deemphasis-gN, and (for G6)
+ * tx-precode-enable-gN device-tree properties and, if all are valid, stores
+ * them as static TX Equalization settings for the given gear.
+ */
+static void ufshcd_parse_tx_eq_settings_for_gear(struct ufs_hba *hba,
+ int gear, const u32 num_elems)
+{
+ u32 precode_en[UFS_MAX_LANES * 2] = { 0 };
+ const u32 lpd = hba->lanes_per_direction;
+ struct ufshcd_tx_eq_params *params;
+ u32 deemphasis[UFS_MAX_LANES * 2];
+ u32 preshoot[UFS_MAX_LANES * 2];
+ struct device *dev = hba->dev;
+ char prop_name[MAX_PROP_SIZE];
+ int i, err, lane, count;
+
+ snprintf(prop_name, MAX_PROP_SIZE, "txeq-preshoot-g%d", gear);
+ count = of_property_count_u32_elems(dev->of_node, prop_name);
+ if (count <= 0)
+ return;
+
+ if (count != num_elems) {
+ dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
+ prop_name, count, num_elems);
+ return;
+ }
+
+ err = of_property_read_u32_array(dev->of_node, prop_name, preshoot, num_elems);
+ if (err) {
+ dev_err(dev, "Failed to read %s property, %d\n", prop_name, err);
+ return;
+ }
+
+ for (i = 0; i < num_elems; i++) {
+ if (preshoot[i] >= TX_HS_NUM_PRESHOOT) {
+ dev_err(dev, "An invalid TX EQ PreShoot (%d) provided in %s property\n",
+ preshoot[i], prop_name);
+ return;
+ }
+ }
+
+ snprintf(prop_name, MAX_PROP_SIZE, "txeq-deemphasis-g%d", gear);
+ count = of_property_count_u32_elems(dev->of_node, prop_name);
+ if (count <= 0) {
+ dev_err(dev, "Missing required %s property\n", prop_name);
+ return;
+ }
+
+ if (count != num_elems) {
+ dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
+ prop_name, count, num_elems);
+ return;
+ }
+
+ err = of_property_read_u32_array(dev->of_node, prop_name, deemphasis, num_elems);
+ if (err) {
+ dev_err(dev, "Failed to read %s property, %d\n", prop_name, err);
+ return;
+ }
+
+ for (i = 0; i < num_elems; i++) {
+ if (deemphasis[i] >= TX_HS_NUM_DEEMPHASIS) {
+ dev_err(dev, "An invalid TX EQ DeEmphasis (%d) provided in %s property\n",
+ deemphasis[i], prop_name);
+ return;
+ }
+ }
+
+ if (gear == UFS_HS_G6) {
+ snprintf(prop_name, MAX_PROP_SIZE, "tx-precode-enable-g%d", gear);
+ count = of_property_count_u32_elems(dev->of_node, prop_name);
+ if (count > 0) {
+ if (count != num_elems) {
+ dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
+ prop_name, count, num_elems);
+ return;
+ }
+
+ err = of_property_read_u32_array(dev->of_node, prop_name,
+ precode_en, num_elems);
+ if (err) {
+ dev_err(dev, "Failed to read %s property, %d\n",
+ prop_name, err);
+ return;
+ }
+
+ for (i = 0; i < num_elems; i++) {
+ if (precode_en[i] > 1) {
+ dev_err(dev, "An invalid PrecodeEn (%d) provided in %s property\n",
+ precode_en[i], prop_name);
+ return;
+ }
+ }
+ }
+ }
+
+ params = &hba->tx_eq_params[gear - 1];
+ for (lane = 0; lane < lpd; lane++) {
+ params->host[lane].preshoot = preshoot[lane * 2];
+ params->host[lane].deemphasis = deemphasis[lane * 2];
+ params->host[lane].precode_en = precode_en[lane * 2];
+
+ params->device[lane].preshoot = preshoot[lane * 2 + 1];
+ params->device[lane].deemphasis = deemphasis[lane * 2 + 1];
+ params->device[lane].precode_en = precode_en[lane * 2 + 1];
+ }
+
+ params->is_valid = true;
+ params->is_static = true;
+}
+
+static void ufshcd_parse_static_tx_eq_settings(struct ufs_hba *hba)
+{
+ const u32 lpd = hba->lanes_per_direction;
+ const u32 num_elems = lpd * 2;
+ int gear;
+
+ if (!lpd) {
+ return;
+ }
+
+ if (lpd > UFS_MAX_LANES) {
+ dev_warn(hba->dev, "lanes_per_direction (%u) exceeds UFS_MAX_LANES (%u)\n",
+ lpd, UFS_MAX_LANES);
+ return;
+ }
+
+ for (gear = UFS_HS_G1; gear <= UFS_HS_GEAR_MAX; gear++)
+ ufshcd_parse_tx_eq_settings_for_gear(hba, gear, num_elems);
+}
+
/**
* ufshcd_parse_clock_min_max_freq - Parse MIN and MAX clocks freq
* @hba: per adapter instance
@@ -528,6 +665,8 @@ int ufshcd_pltfrm_init(struct platform_device *pdev,
ufshcd_init_lanes_per_dir(hba);
+ ufshcd_parse_static_tx_eq_settings(hba);
+
err = ufshcd_parse_operating_points(hba);
if (err) {
dev_err(dev, "%s: OPP parse failed %d\n", __func__, err);
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index f48d6416e299..c01824576472 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -359,6 +359,7 @@ struct ufshcd_tx_eqtr_record {
* @is_valid: True if parameter contains valid TX Equalization settings
* @is_applied: True if settings have been applied to UniPro of both sides
* @is_trained: True if parameters obtained from TX EQTR procedure
+ * @is_static: True if settings are static
*/
struct ufshcd_tx_eq_params {
struct ufshcd_tx_eq_settings host[UFS_MAX_LANES];
@@ -367,6 +368,7 @@ struct ufshcd_tx_eq_params {
bool is_valid;
bool is_applied;
bool is_trained;
+ bool is_static;
};
/**
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-29 11:33 ` [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo
@ 2026-05-29 16:58 ` Krzysztof Kozlowski
2026-05-30 12:45 ` Can Guo
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-05-29 16:58 UTC (permalink / raw)
To: Can Guo
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
> and M-PHY v6.0. In these specs, TX Equalization is defined for all High
> Speed Gears (not only HS-G6) to compensate channel loss and improve signal
> integrity at high speed operation.
>
> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
> required depending on channel characteristics.
>
> Add vendor-neutral DT properties:
>
> - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
> - fixed property tx-precode-enable-g6
>
> Each property is a uint32 array of per-lane tuples:
> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>
> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values
> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>
> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
> Reviewed-by: Bean Huo <beanhuo@micron.com>
> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
> ---
> .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
> index ed97f5682509..d90cf25adfa5 100644
> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
> @@ -105,6 +105,51 @@ properties:
> Restricts the UFS controller to rate-a or rate-b for both TX and
> RX directions.
>
> + tx-precode-enable-g6:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + oneOf:
> + - minItems: 2
> + maxItems: 2
> + - minItems: 4
> + maxItems: 4
> + items:
> + enum: [0, 1]
> + description: |
> + Static TX Precode enable values for HS-G6 only.
> + Values are specified as per-lane tuples:
> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
You need to include them in any of applicable examples, otherwise
nothing here is validated.
Why values cannot be on or off? Or even better: why you cannot just list
all the lanes which has it enabled, assuming disabled is by default?
> +
> +patternProperties:
> + "^txeq-preshoot-g[1-6]$":
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + oneOf:
> + - minItems: 2
> + maxItems: 2
> + - minItems: 4
> + maxItems: 4
> + items:
> + minimum: 0
> + maximum: 7
What is the meaning of values? Nothing here refers to the spec, so is
this driver specific?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 2/2] scsi: ufs: core: Add support for static TX Equalization settings
2026-05-29 11:33 ` [PATCH v6 2/2] scsi: ufs: core: Add support for static TX Equalization settings Can Guo
@ 2026-05-29 17:52 ` Manivannan Sadhasivam
0 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2026-05-29 17:52 UTC (permalink / raw)
To: Can Guo
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, linux-scsi,
Alim Akhtar, Avri Altman, James E.J. Bottomley, Nitin Rawat,
Ram Kumar Dwivedi, open list
On Fri, May 29, 2026 at 04:33:38AM -0700, Can Guo wrote:
> Static TX Equalization settings and TX Precode enable indication from DT
> properties txeq-preshoot-g[1-6], txeq-deemphasis-g[1-6], and
> tx-precode-enable-g6 are board-specific baseline values. Values are
> provided as per-lane tuples:
>
> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>
> Parse DT u32 properties with explicit range checks by using
> of_property_count_u32_elems()/of_property_read_u32_array().
>
> When adaptive TX Equalization is used, these static settings are not final:
>
> - If valid settings are retrieved from qTxEQGnSettings/wTxEQGnSettingsExt,
> those retrieved settings override static DT settings.
> - If retrieval is not available/valid, TX EQTR runs and trained settings
> override static DT settings.
>
> So static DT settings are a fallback and are intended for cases where
> adaptive TX Equalization is not enabled/used. Adaptive TX Equalization
> remains the primary path when enabled.
>
> No behavior changes for platforms that do not provide these properties.
>
> Reviewed-by: Bean Huo <beanhuo@micron.com>
> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
A couple of nits below.
> ---
> drivers/ufs/core/ufs-txeq.c | 10 ++-
> drivers/ufs/host/ufshcd-pltfrm.c | 139 +++++++++++++++++++++++++++++++
> include/ufs/ufshcd.h | 2 +
> 3 files changed, 150 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/ufs/core/ufs-txeq.c b/drivers/ufs/core/ufs-txeq.c
> index 4b264adfdf49..b645fe5f6d95 100644
> --- a/drivers/ufs/core/ufs-txeq.c
> +++ b/drivers/ufs/core/ufs-txeq.c
> @@ -1297,7 +1297,13 @@ int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
> }
>
> params = &hba->tx_eq_params[gear - 1];
> - if (!params->is_valid || force_tx_eqtr) {
> + /*
> + * TX EQTR must run for the following cases:
> + * 1. TX EQ settings are invalid.
> + * 2. TX EQ settings are valid but static, i.e., populated from DT.
> + * 3. TX EQTR procedure is forced.
> + */
> + if (!params->is_valid || params->is_static || force_tx_eqtr) {
> int ret;
>
> ret = ufshcd_tx_eqtr(hba, params, pwr_mode);
> @@ -1310,6 +1316,7 @@ int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
> /* Mark TX Equalization settings as valid */
> params->is_valid = true;
> params->is_trained = true;
> + params->is_static = false;
> params->is_applied = false;
> }
>
> @@ -1495,6 +1502,7 @@ static void ufshcd_extract_tx_eq_settings_attrs(struct ufs_hba *hba, u8 gear)
> }
>
> params->is_valid = true;
> + params->is_static = false;
> }
>
> void ufshcd_retrieve_tx_eq_settings(struct ufs_hba *hba)
> diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c
> index c2dafb583cf5..fc6aa91b6210 100644
> --- a/drivers/ufs/host/ufshcd-pltfrm.c
> +++ b/drivers/ufs/host/ufshcd-pltfrm.c
> @@ -210,6 +210,143 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba)
> }
> }
>
> +/**
> + * ufshcd_parse_tx_eq_settings_for_gear - Parse static TX EQ DT settings for one gear
> + * @hba: per adapter instance
> + * @gear: target HS gear
> + * @num_elems: expected number of elements per property
> + *
> + * Reads the txeq-preshoot-gN, txeq-deemphasis-gN, and (for G6)
> + * tx-precode-enable-gN device-tree properties and, if all are valid, stores
> + * them as static TX Equalization settings for the given gear.
> + */
> +static void ufshcd_parse_tx_eq_settings_for_gear(struct ufs_hba *hba,
> + int gear, const u32 num_elems)
ufshcd_parse_tx_eq_settings_per_gear()?
> +{
> + u32 precode_en[UFS_MAX_LANES * 2] = { 0 };
> + const u32 lpd = hba->lanes_per_direction;
> + struct ufshcd_tx_eq_params *params;
> + u32 deemphasis[UFS_MAX_LANES * 2];
> + u32 preshoot[UFS_MAX_LANES * 2];
> + struct device *dev = hba->dev;
> + char prop_name[MAX_PROP_SIZE];
> + int i, err, lane, count;
> +
> + snprintf(prop_name, MAX_PROP_SIZE, "txeq-preshoot-g%d", gear);
> + count = of_property_count_u32_elems(dev->of_node, prop_name);
> + if (count <= 0)
> + return;
> +
> + if (count != num_elems) {
> + dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
> + prop_name, count, num_elems);
> + return;
> + }
> +
> + err = of_property_read_u32_array(dev->of_node, prop_name, preshoot, num_elems);
> + if (err) {
> + dev_err(dev, "Failed to read %s property, %d\n", prop_name, err);
> + return;
> + }
> +
> + for (i = 0; i < num_elems; i++) {
> + if (preshoot[i] >= TX_HS_NUM_PRESHOOT) {
> + dev_err(dev, "An invalid TX EQ PreShoot (%d) provided in %s property\n",
> + preshoot[i], prop_name);
> + return;
> + }
> + }
> +
> + snprintf(prop_name, MAX_PROP_SIZE, "txeq-deemphasis-g%d", gear);
> + count = of_property_count_u32_elems(dev->of_node, prop_name);
> + if (count <= 0) {
> + dev_err(dev, "Missing required %s property\n", prop_name);
> + return;
> + }
> +
> + if (count != num_elems) {
> + dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
> + prop_name, count, num_elems);
> + return;
> + }
> +
> + err = of_property_read_u32_array(dev->of_node, prop_name, deemphasis, num_elems);
> + if (err) {
> + dev_err(dev, "Failed to read %s property, %d\n", prop_name, err);
> + return;
> + }
> +
> + for (i = 0; i < num_elems; i++) {
> + if (deemphasis[i] >= TX_HS_NUM_DEEMPHASIS) {
> + dev_err(dev, "An invalid TX EQ DeEmphasis (%d) provided in %s property\n",
> + deemphasis[i], prop_name);
> + return;
> + }
> + }
> +
> + if (gear == UFS_HS_G6) {
> + snprintf(prop_name, MAX_PROP_SIZE, "tx-precode-enable-g%d", gear);
> + count = of_property_count_u32_elems(dev->of_node, prop_name);
> + if (count > 0) {
> + if (count != num_elems) {
> + dev_err(dev, "Property %s has invalid count (%d), expecting %u\n",
> + prop_name, count, num_elems);
> + return;
> + }
> +
> + err = of_property_read_u32_array(dev->of_node, prop_name,
> + precode_en, num_elems);
> + if (err) {
> + dev_err(dev, "Failed to read %s property, %d\n",
> + prop_name, err);
> + return;
> + }
> +
> + for (i = 0; i < num_elems; i++) {
> + if (precode_en[i] > 1) {
> + dev_err(dev, "An invalid PrecodeEn (%d) provided in %s property\n",
> + precode_en[i], prop_name);
> + return;
> + }
> + }
> + }
> + }
> +
> + params = &hba->tx_eq_params[gear - 1];
> + for (lane = 0; lane < lpd; lane++) {
> + params->host[lane].preshoot = preshoot[lane * 2];
> + params->host[lane].deemphasis = deemphasis[lane * 2];
> + params->host[lane].precode_en = precode_en[lane * 2];
> +
> + params->device[lane].preshoot = preshoot[lane * 2 + 1];
> + params->device[lane].deemphasis = deemphasis[lane * 2 + 1];
> + params->device[lane].precode_en = precode_en[lane * 2 + 1];
> + }
> +
> + params->is_valid = true;
> + params->is_static = true;
> +}
> +
> +static void ufshcd_parse_static_tx_eq_settings(struct ufs_hba *hba)
> +{
> + const u32 lpd = hba->lanes_per_direction;
> + const u32 num_elems = lpd * 2;
> + int gear;
> +
> + if (!lpd) {
> + return;
> + }
Redundant braces.
- Mani
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-29 16:58 ` Krzysztof Kozlowski
@ 2026-05-30 12:45 ` Can Guo
2026-05-30 13:57 ` Can Guo
2026-05-30 17:33 ` Krzysztof Kozlowski
0 siblings, 2 replies; 11+ messages in thread
From: Can Guo @ 2026-05-30 12:45 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 5/30/2026 12:58 AM, Krzysztof Kozlowski wrote:
> On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
>> and M-PHY v6.0. In these specs, TX Equalization is defined for all High
>> Speed Gears (not only HS-G6) to compensate channel loss and improve signal
>> integrity at high speed operation.
>>
>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
>> required depending on channel characteristics.
>>
>> Add vendor-neutral DT properties:
>>
>> - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
>> - fixed property tx-precode-enable-g6
>>
>> Each property is a uint32 array of per-lane tuples:
>> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>>
>> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values
>> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>>
>> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
>> Reviewed-by: Bean Huo <beanhuo@micron.com>
>> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>> ---
>> .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++
>> 1 file changed, 45 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> index ed97f5682509..d90cf25adfa5 100644
>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>> @@ -105,6 +105,51 @@ properties:
>> Restricts the UFS controller to rate-a or rate-b for both TX and
>> RX directions.
>>
>> + tx-precode-enable-g6:
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>> + oneOf:
>> + - minItems: 2
>> + maxItems: 2
>> + - minItems: 4
>> + maxItems: 4
>> + items:
>> + enum: [0, 1]
>> + description: |
>> + Static TX Precode enable values for HS-G6 only.
>> + Values are specified as per-lane tuples:
>> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
> You need to include them in any of applicable examples, otherwise
> nothing here is validated.
Hi Krzysztof,
Thanks for the review.
Since no UFS5-capable SoC binding exists upstream yet (the target SoC is
still pre-CS), there is no vendor-specific YAML to attach the example to.
Is a synthetic example directly in ufs-common.yaml OK to you?
>
> Why values cannot be on or off? Or even better: why you cannot just list
> all the lanes which has it enabled, assuming disabled is by default?
Thanks for the suggestions.
For the "just list enabled lanes" suggestion: precode must be configured
independently for the Host-side TX and Device-side TX transceivers within
the same physical lane. A lane index list alone cannot capture this
two-dimensional per-lane state. The tuple format <Host_LaneN Device_LaneN>
is the minimal encoding that covers both.
For the "on/off" suggestion: the on/off string pattern is used with
single-value properties (e.g. LED default-state) read via
of_property_read_string(). I am not aware of precedent for on/off as a
string array for per-lane tuples.
>
>> +
>> +patternProperties:
>> + "^txeq-preshoot-g[1-6]$":
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>> + oneOf:
>> + - minItems: 2
>> + maxItems: 2
>> + - minItems: 4
>> + maxItems: 4
>> + items:
>> + minimum: 0
>> + maximum: 7
> What is the meaning of values? Nothing here refers to the spec, so is
> this driver specific?
These are not driver-specific. PreShoot and DeEmphasis are standard
features of the MIPI M-PHY / UniPro stack. The range [0, 7] is defined
in the UniPro specification for the relevant PA layer attributes, and each
value maps to a specific dB level as defined in the M-PHY specification.
I will add the value-to-dB mapping table to the property descriptions in v7.
Thanks,
Can Guo.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-30 12:45 ` Can Guo
@ 2026-05-30 13:57 ` Can Guo
2026-05-30 17:33 ` Krzysztof Kozlowski
1 sibling, 0 replies; 11+ messages in thread
From: Can Guo @ 2026-05-30 13:57 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 5/30/2026 8:45 PM, Can Guo wrote:
>
>
> On 5/30/2026 12:58 AM, Krzysztof Kozlowski wrote:
>> On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all High
>>> Speed Gears (not only HS-G6) to compensate channel loss and improve
>>> signal
>>> integrity at high speed operation.
>>>
>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
>>> required depending on channel characteristics.
>>>
>>> Add vendor-neutral DT properties:
>>>
>>> - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
>>> - fixed property tx-precode-enable-g6
>>>
>>> Each property is a uint32 array of per-lane tuples:
>>> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>>>
>>> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis
>>> values
>>> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>>>
>>> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
>>> Reviewed-by: Bean Huo <beanhuo@micron.com>
>>> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
>>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>>> ---
>>> .../devicetree/bindings/ufs/ufs-common.yaml | 45
>>> +++++++++++++++++++
>>> 1 file changed, 45 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> index ed97f5682509..d90cf25adfa5 100644
>>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> @@ -105,6 +105,51 @@ properties:
>>> Restricts the UFS controller to rate-a or rate-b for both TX
>>> and
>>> RX directions.
>>> + tx-precode-enable-g6:
>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>> + oneOf:
>>> + - minItems: 2
>>> + maxItems: 2
>>> + - minItems: 4
>>> + maxItems: 4
>>> + items:
>>> + enum: [0, 1]
>>> + description: |
>>> + Static TX Precode enable values for HS-G6 only.
>>> + Values are specified as per-lane tuples:
>>> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
>> You need to include them in any of applicable examples, otherwise
>> nothing here is validated.
> Hi Krzysztof,
>
> Thanks for the review.
>
> Since no UFS5-capable SoC binding exists upstream yet (the target SoC is
> still pre-CS), there is no vendor-specific YAML to attach the example to.
>
> Is a synthetic example directly in ufs-common.yaml OK to you?
Let me update qcom,sm8650-ufshc.yaml as it includes sm8650 and others.
Thanks,
Can Guo.
>>
>> Why values cannot be on or off? Or even better: why you cannot just list
>> all the lanes which has it enabled, assuming disabled is by default?
> Thanks for the suggestions.
>
> For the "just list enabled lanes" suggestion: precode must be configured
> independently for the Host-side TX and Device-side TX transceivers within
> the same physical lane. A lane index list alone cannot capture this
> two-dimensional per-lane state. The tuple format <Host_LaneN
> Device_LaneN>
> is the minimal encoding that covers both.
>
> For the "on/off" suggestion: the on/off string pattern is used with
> single-value properties (e.g. LED default-state) read via
> of_property_read_string(). I am not aware of precedent for on/off as a
> string array for per-lane tuples.
>>
>>> +
>>> +patternProperties:
>>> + "^txeq-preshoot-g[1-6]$":
>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>> + oneOf:
>>> + - minItems: 2
>>> + maxItems: 2
>>> + - minItems: 4
>>> + maxItems: 4
>>> + items:
>>> + minimum: 0
>>> + maximum: 7
>> What is the meaning of values? Nothing here refers to the spec, so is
>> this driver specific?
> These are not driver-specific. PreShoot and DeEmphasis are standard
> features of the MIPI M-PHY / UniPro stack. The range [0, 7] is defined
> in the UniPro specification for the relevant PA layer attributes, and
> each
> value maps to a specific dB level as defined in the M-PHY specification.
> I will add the value-to-dB mapping table to the property descriptions
> in v7.
>
> Thanks,
> Can Guo.
>>
>> Best regards,
>> Krzysztof
>>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-30 12:45 ` Can Guo
2026-05-30 13:57 ` Can Guo
@ 2026-05-30 17:33 ` Krzysztof Kozlowski
2026-05-31 1:41 ` Can Guo
1 sibling, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-05-30 17:33 UTC (permalink / raw)
To: Can Guo
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 30/05/2026 14:45, Can Guo wrote:
>
>
> On 5/30/2026 12:58 AM, Krzysztof Kozlowski wrote:
>> On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all High
>>> Speed Gears (not only HS-G6) to compensate channel loss and improve signal
>>> integrity at high speed operation.
>>>
>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
>>> required depending on channel characteristics.
>>>
>>> Add vendor-neutral DT properties:
>>>
>>> - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
>>> - fixed property tx-precode-enable-g6
>>>
>>> Each property is a uint32 array of per-lane tuples:
>>> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>>>
>>> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values
>>> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>>>
>>> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
>>> Reviewed-by: Bean Huo <beanhuo@micron.com>
>>> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
>>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>>> ---
>>> .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++
>>> 1 file changed, 45 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> index ed97f5682509..d90cf25adfa5 100644
>>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>> @@ -105,6 +105,51 @@ properties:
>>> Restricts the UFS controller to rate-a or rate-b for both TX and
>>> RX directions.
>>>
>>> + tx-precode-enable-g6:
>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>> + oneOf:
>>> + - minItems: 2
>>> + maxItems: 2
>>> + - minItems: 4
>>> + maxItems: 4
>>> + items:
>>> + enum: [0, 1]
>>> + description: |
>>> + Static TX Precode enable values for HS-G6 only.
>>> + Values are specified as per-lane tuples:
>>> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
>> You need to include them in any of applicable examples, otherwise
>> nothing here is validated.
> Hi Krzysztof,
>
> Thanks for the review.
>
> Since no UFS5-capable SoC binding exists upstream yet (the target SoC is
I would imagine cover letter or commit msg would briefly mention that.
> still pre-CS), there is no vendor-specific YAML to attach the example to.
>
> Is a synthetic example directly in ufs-common.yaml OK to you?
Skip example in such case.
>>
>> Why values cannot be on or off? Or even better: why you cannot just list
>> all the lanes which has it enabled, assuming disabled is by default?
> Thanks for the suggestions.
>
> For the "just list enabled lanes" suggestion: precode must be configured
> independently for the Host-side TX and Device-side TX transceivers within
> the same physical lane. A lane index list alone cannot capture this
> two-dimensional per-lane state. The tuple format <Host_LaneN Device_LaneN>
> is the minimal encoding that covers both.
Again, why do you need to encode '0'?
>
> For the "on/off" suggestion: the on/off string pattern is used with
> single-value properties (e.g. LED default-state) read via
> of_property_read_string(). I am not aware of precedent for on/off as a
> string array for per-lane tuples.
git grep string-array. Plenty of precedents.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-30 17:33 ` Krzysztof Kozlowski
@ 2026-05-31 1:41 ` Can Guo
2026-05-31 4:48 ` Can Guo
0 siblings, 1 reply; 11+ messages in thread
From: Can Guo @ 2026-05-31 1:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 5/31/2026 1:33 AM, Krzysztof Kozlowski wrote:
> On 30/05/2026 14:45, Can Guo wrote:
>>
>> On 5/30/2026 12:58 AM, Krzysztof Kozlowski wrote:
>>> On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
>>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro v3.0
>>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all High
>>>> Speed Gears (not only HS-G6) to compensate channel loss and improve signal
>>>> integrity at high speed operation.
>>>>
>>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
>>>> required depending on channel characteristics.
>>>>
>>>> Add vendor-neutral DT properties:
>>>>
>>>> - patternProperties for txeq-preshoot-g[1-6] and txeq-deemphasis-g[1-6]
>>>> - fixed property tx-precode-enable-g6
>>>>
>>>> Each property is a uint32 array of per-lane tuples:
>>>> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>>>>
>>>> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis values
>>>> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>>>>
>>>> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
>>>> Reviewed-by: Bean Huo <beanhuo@micron.com>
>>>> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
>>>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>>>> ---
>>>> .../devicetree/bindings/ufs/ufs-common.yaml | 45 +++++++++++++++++++
>>>> 1 file changed, 45 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>> index ed97f5682509..d90cf25adfa5 100644
>>>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>> @@ -105,6 +105,51 @@ properties:
>>>> Restricts the UFS controller to rate-a or rate-b for both TX and
>>>> RX directions.
>>>>
>>>> + tx-precode-enable-g6:
>>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>>> + oneOf:
>>>> + - minItems: 2
>>>> + maxItems: 2
>>>> + - minItems: 4
>>>> + maxItems: 4
>>>> + items:
>>>> + enum: [0, 1]
>>>> + description: |
>>>> + Static TX Precode enable values for HS-G6 only.
>>>> + Values are specified as per-lane tuples:
>>>> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
>>> You need to include them in any of applicable examples, otherwise
>>> nothing here is validated.
>> Hi Krzysztof,
>>
>> Thanks for the review.
>>
>> Since no UFS5-capable SoC binding exists upstream yet (the target SoC is
> I would imagine cover letter or commit msg would briefly mention that.
Thanks for the clarification. Will do.
>
>> still pre-CS), there is no vendor-specific YAML to attach the example to.
>>
>> Is a synthetic example directly in ufs-common.yaml OK to you?
> Skip example in such case.
>
>>> Why values cannot be on or off? Or even better: why you cannot just list
>>> all the lanes which has it enabled, assuming disabled is by default?
>> Thanks for the suggestions.
>>
>> For the "just list enabled lanes" suggestion: precode must be configured
>> independently for the Host-side TX and Device-side TX transceivers within
>> the same physical lane. A lane index list alone cannot capture this
>> two-dimensional per-lane state. The tuple format <Host_LaneN Device_LaneN>
>> is the minimal encoding that covers both.
> Again, why do you need to encode '0'?
The tuple is still needed because Precoding is configured per
transmitter-receiver pair,
so each lane has two independent states:
- Host_TX -> Device_RX
- Device_TX -> Host_RX
A lane-only enabled list cannot represent directional combinations like
lane0 =
(on, off) vs (off, on).
>
>> For the "on/off" suggestion: the on/off string pattern is used with
>> single-value properties (e.g. LED default-state) read via
>> of_property_read_string(). I am not aware of precedent for on/off as a
>> string array for per-lane tuples.
> git grep string-array. Plenty of precedents.
I will keep the per-lane tuple model but switch tx-precode-enable-g6
from 0/1 to
"on"/"off" (string array) in v7.
Thanks,
Can Guo.
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-31 1:41 ` Can Guo
@ 2026-05-31 4:48 ` Can Guo
2026-06-09 7:08 ` Krzysztof Kozlowski
0 siblings, 1 reply; 11+ messages in thread
From: Can Guo @ 2026-05-31 4:48 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 5/31/2026 9:41 AM, Can Guo wrote:
>
>
> On 5/31/2026 1:33 AM, Krzysztof Kozlowski wrote:
>> On 30/05/2026 14:45, Can Guo wrote:
>>>
>>> On 5/30/2026 12:58 AM, Krzysztof Kozlowski wrote:
>>>> On Fri, May 29, 2026 at 04:33:37AM -0700, Can Guo wrote:
>>>>> UFS v5.0/UFSHCI v5.0 add HS-G6 support (46.6 Gbps/lane) via UniPro
>>>>> v3.0
>>>>> and M-PHY v6.0. In these specs, TX Equalization is defined for all
>>>>> High
>>>>> Speed Gears (not only HS-G6) to compensate channel loss and
>>>>> improve signal
>>>>> integrity at high speed operation.
>>>>>
>>>>> For HS-G6, M-PHY uses PAM4 1b1b line coding, Pre-Coding may also be
>>>>> required depending on channel characteristics.
>>>>>
>>>>> Add vendor-neutral DT properties:
>>>>>
>>>>> - patternProperties for txeq-preshoot-g[1-6] and
>>>>> txeq-deemphasis-g[1-6]
>>>>> - fixed property tx-precode-enable-g6
>>>>>
>>>>> Each property is a uint32 array of per-lane tuples:
>>>>> <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>]
>>>>>
>>>>> Accept 2 or 4 values (x1/x2 lane configs). PreShoot and DeEmphasis
>>>>> values
>>>>> are 0..7. Precode enable values are 0/1 and only applicable to HS-G6.
>>>>>
>>>>> Acked-by: Manivannan Sadhasivam <mani@kernel.org>
>>>>> Reviewed-by: Bean Huo <beanhuo@micron.com>
>>>>> Reviewed-by: Peter Wang <peter.wang@mediatek.com>
>>>>> Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
>>>>> ---
>>>>> .../devicetree/bindings/ufs/ufs-common.yaml | 45
>>>>> +++++++++++++++++++
>>>>> 1 file changed, 45 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>>> b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>>> index ed97f5682509..d90cf25adfa5 100644
>>>>> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>>> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>>>>> @@ -105,6 +105,51 @@ properties:
>>>>> Restricts the UFS controller to rate-a or rate-b for both
>>>>> TX and
>>>>> RX directions.
>>>>> + tx-precode-enable-g6:
>>>>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>>>>> + oneOf:
>>>>> + - minItems: 2
>>>>> + maxItems: 2
>>>>> + - minItems: 4
>>>>> + maxItems: 4
>>>>> + items:
>>>>> + enum: [0, 1]
>>>>> + description: |
>>>>> + Static TX Precode enable values for HS-G6 only.
>>>>> + Values are specified as per-lane tuples:
>>>>> + <Host_Lane0 Device_Lane0>, [<Host_Lane1 Device_Lane1>].
>>>> You need to include them in any of applicable examples, otherwise
>>>> nothing here is validated.
>>> Hi Krzysztof,
>>>
>>> Thanks for the review.
>>>
>>> Since no UFS5-capable SoC binding exists upstream yet (the target
>>> SoC is
>> I would imagine cover letter or commit msg would briefly mention that.
> Thanks for the clarification. Will do.
>>
>>> still pre-CS), there is no vendor-specific YAML to attach the
>>> example to.
>>>
>>> Is a synthetic example directly in ufs-common.yaml OK to you?
>> Skip example in such case.
>>
>>>> Why values cannot be on or off? Or even better: why you cannot just
>>>> list
>>>> all the lanes which has it enabled, assuming disabled is by default?
>>> Thanks for the suggestions.
>>>
>>> For the "just list enabled lanes" suggestion: precode must be
>>> configured
>>> independently for the Host-side TX and Device-side TX transceivers
>>> within
>>> the same physical lane. A lane index list alone cannot capture this
>>> two-dimensional per-lane state. The tuple format <Host_LaneN
>>> Device_LaneN>
>>> is the minimal encoding that covers both.
>> Again, why do you need to encode '0'?
> The tuple is still needed because Precoding is configured per
> transmitter-receiver pair,
> so each lane has two independent states:
> - Host_TX -> Device_RX
> - Device_TX -> Host_RX
> A lane-only enabled list cannot represent directional combinations
> like lane0 =
> (on, off) vs (off, on).
How about we split into two properties, something like below?
tx-precode-enable-g6-host-lanes = <0 1>
tx-precode-enable-g6-device-lanes = <1>
Only listed lanes are enabled; unlisted lanes are disabled by default.
Are you OK with this approach?
Thanks,
Can Guo.
>>
>>> For the "on/off" suggestion: the on/off string pattern is used with
>>> single-value properties (e.g. LED default-state) read via
>>> of_property_read_string(). I am not aware of precedent for on/off as a
>>> string array for per-lane tuples.
>> git grep string-array. Plenty of precedents.
> I will keep the per-lane tuple model but switch tx-precode-enable-g6
> from 0/1 to
> "on"/"off" (string array) in v7.
>
> Thanks,
> Can Guo.
>>
>> Best regards,
>> Krzysztof
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-05-31 4:48 ` Can Guo
@ 2026-06-09 7:08 ` Krzysztof Kozlowski
2026-06-09 9:10 ` Can Guo
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-06-09 7:08 UTC (permalink / raw)
To: Can Guo
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 31/05/2026 06:48, Can Guo wrote:
>>>> is the minimal encoding that covers both.
>>> Again, why do you need to encode '0'?
>> The tuple is still needed because Precoding is configured per
>> transmitter-receiver pair,
>> so each lane has two independent states:
>> - Host_TX -> Device_RX
>> - Device_TX -> Host_RX
>> A lane-only enabled list cannot represent directional combinations
>> like lane0 =
>> (on, off) vs (off, on).
> How about we split into two properties, something like below?
> tx-precode-enable-g6-host-lanes = <0 1>
> tx-precode-enable-g6-device-lanes = <1>
>
> Only listed lanes are enabled; unlisted lanes are disabled by default.
>
> Are you OK with this approach?
Yes, I do prefer this, because we don't have empty entries (<0, 0>, <0,
1> ....).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties
2026-06-09 7:08 ` Krzysztof Kozlowski
@ 2026-06-09 9:10 ` Can Guo
0 siblings, 0 replies; 11+ messages in thread
From: Can Guo @ 2026-06-09 9:10 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: bvanassche, beanhuo, peter.wang, martin.petersen, mani,
linux-scsi, Alim Akhtar, Avri Altman, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
AngeloGioacchino Del Regno, Zhaoming Luo, Ram Kumar Dwivedi,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek,
moderated list:ARM/Mediatek SoC support:Keyword:mediatek
On 6/9/2026 3:08 PM, Krzysztof Kozlowski wrote:
> On 31/05/2026 06:48, Can Guo wrote:
>>>>> is the minimal encoding that covers both.
>>>> Again, why do you need to encode '0'?
>>> The tuple is still needed because Precoding is configured per
>>> transmitter-receiver pair,
>>> so each lane has two independent states:
>>> - Host_TX -> Device_RX
>>> - Device_TX -> Host_RX
>>> A lane-only enabled list cannot represent directional combinations
>>> like lane0 =
>>> (on, off) vs (off, on).
>> How about we split into two properties, something like below?
>> tx-precode-enable-g6-host-lanes = <0 1>
>> tx-precode-enable-g6-device-lanes = <1>
>>
>> Only listed lanes are enabled; unlisted lanes are disabled by default.
>>
>> Are you OK with this approach?
> Yes, I do prefer this, because we don't have empty entries (<0, 0>, <0,
> 1> ....).
Thank you for coming back. Sure, I will use this format in next version.
Best Regards,
Can Guo.
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-06-09 9:10 UTC | newest]
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2026-05-29 11:33 ` [PATCH v6 1/2] dt-bindings: ufs: Document static TX Equalization settings properties Can Guo
2026-05-29 16:58 ` Krzysztof Kozlowski
2026-05-30 12:45 ` Can Guo
2026-05-30 13:57 ` Can Guo
2026-05-30 17:33 ` Krzysztof Kozlowski
2026-05-31 1:41 ` Can Guo
2026-05-31 4:48 ` Can Guo
2026-06-09 7:08 ` Krzysztof Kozlowski
2026-06-09 9:10 ` Can Guo
2026-05-29 11:33 ` [PATCH v6 2/2] scsi: ufs: core: Add support for static TX Equalization settings Can Guo
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