From: Boris Brezillon <boris.brezillon@collabora.com>
To: Karunika Choo <karunika.choo@arm.com>
Cc: dri-devel@lists.freedesktop.org, nd@arm.com,
Steven Price <steven.price@arm.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 04/18] drm/panthor: Add 64-bit GPU_ID decoding for v15 GPUs
Date: Mon, 8 Jun 2026 15:28:17 +0200 [thread overview]
Message-ID: <20260608152817.7f72ab08@fedora-2.home> (raw)
In-Reply-To: <20260528150546.3168527-5-karunika.choo@arm.com>
On Thu, 28 May 2026 16:05:32 +0100
Karunika Choo <karunika.choo@arm.com> wrote:
> Mali v15 exposes a 64-bit GPU_ID register with a different field layout
> from earlier GPUs.
>
> Add the register definitions and decoding helpers for the new format,
> read GPU_WIDE_ID when the compatibility value indicates a v15 GPU, and
> populate both the cached GPU_ID fields and the uAPI gpu_id_hi field.
>
> This allows userspace and the driver to identify v15 GPUs correctly.
>
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
> .../drm/panthor/panthor_gpu_discover_regs.h | 17 +++++++++
> drivers/gpu/drm/panthor/panthor_hw.c | 38 ++++++++++++++-----
> include/uapi/drm/panthor_drm.h | 10 +++++
> 3 files changed, 56 insertions(+), 9 deletions(-)
> create mode 100644 drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
>
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
> new file mode 100644
> index 000000000000..54bb104902ee
> --- /dev/null
> +++ b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0 or MIT */
> +/* Copyright 2026 ARM Limited. All rights reserved. */
> +
> +#ifndef __PANTHOR_GPU_DISCOVER_REGS_H__
> +#define __PANTHOR_GPU_DISCOVER_REGS_H__
> +
> +#define GPU_WIDE_ID 0x0
> +#define GPU_WIDE_COMPAT 0xF
> +#define GPU_WIDE_ARCH_MAJOR(x) (((x) & GENMASK(63, 56)) >> 56)
> +#define GPU_WIDE_ARCH_MINOR(x) (((x) & GENMASK(55, 48)) >> 48)
> +#define GPU_WIDE_ARCH_REV(x) (((x) & GENMASK(47, 40)) >> 40)
> +#define GPU_WIDE_PROD_MAJOR(x) (((x) & GENMASK(39, 32)) >> 32)
> +#define GPU_WIDE_VER_MAJOR(x) (((x) & GENMASK(23, 16)) >> 16)
> +#define GPU_WIDE_VER_MINOR(x) (((x) & GENMASK(15, 8)) >> 8)
> +#define GPU_WIDE_VER_STATUS(x) ((x) & GENMASK(7, 0))
> +
> +#endif /* __PANTHOR_GPU_DISCOVER_REGS_H__ */
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index 3570e2889584..833d10cbb2d6 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> @@ -9,6 +9,7 @@
> #include "panthor_device.h"
> #include "panthor_device_io.h"
> #include "panthor_gpu.h"
> +#include "panthor_gpu_discover_regs.h"
> #include "panthor_gpu_regs.h"
> #include "panthor_hw.h"
> #include "panthor_pwr.h"
> @@ -297,18 +298,37 @@ static int panthor_hw_bind_device(struct panthor_device *ptdev)
> static int panthor_hw_gpu_id_init(struct panthor_device *ptdev)
> {
> struct panthor_gpu_id *gpu_id = &ptdev->gpu_id;
> - ptdev->gpu_info.gpu_id = gpu_read(ptdev->iomem, GPU_ID);
> + u32 gpu_id32 = gpu_read(ptdev->iomem, GPU_ID);
>
> - if (!ptdev->gpu_info.gpu_id)
> + if (!gpu_id32)
> return -ENXIO;
>
> - gpu_id->arch.major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
> - gpu_id->arch.minor = GPU_ARCH_MINOR(ptdev->gpu_info.gpu_id);
> - gpu_id->arch.rev = GPU_ARCH_REV(ptdev->gpu_info.gpu_id);
> - gpu_id->prod_major = GPU_PROD_MAJOR(ptdev->gpu_info.gpu_id);
> - gpu_id->ver.major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
> - gpu_id->ver.minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
> - gpu_id->ver.status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
> + ptdev->gpu_info.gpu_id = gpu_id32;
> +
> + gpu_id->arch.major = GPU_ARCH_MAJOR(gpu_id32);
> + gpu_id->arch.minor = GPU_ARCH_MINOR(gpu_id32);
> + gpu_id->arch.rev = GPU_ARCH_REV(gpu_id32);
> + gpu_id->prod_major = GPU_PROD_MAJOR(gpu_id32);
> + gpu_id->ver.major = GPU_VER_MAJOR(gpu_id32);
> + gpu_id->ver.minor = GPU_VER_MINOR(gpu_id32);
> + gpu_id->ver.status = GPU_VER_STATUS(gpu_id32);
> +
> + if (GPU_ARCH_MAJOR(gpu_id32) == GPU_WIDE_COMPAT) {
> + u64 gpu_id64 = gpu_read64(ptdev->iomem, GPU_WIDE_ID);
I know we currently assume that DISCOVER regs on v15 and GPU regs on
older gens are starting at zero, but I'd prefer to make this explicit
with something like:
/* DISCOVER register block always starts at offset
* zero, so does the GPU register block on older
* GPUs.
*/
void __iomem *discover = ptdev->iomem;
u64 gpu_id64 = gpu_read64(discover, GPU_WIDE_ID);
> + if (!gpu_id64)
> + return -ENXIO;
> +
> + ptdev->gpu_info.gpu_wide_id = gpu_id64;
> + ptdev->gpu_info.gpu_id = 0;
> +
> + gpu_id->arch.major = GPU_WIDE_ARCH_MAJOR(gpu_id64);
> + gpu_id->arch.minor = GPU_WIDE_ARCH_MINOR(gpu_id64);
> + gpu_id->arch.rev = GPU_WIDE_ARCH_REV(gpu_id64);
> + gpu_id->prod_major = GPU_WIDE_PROD_MAJOR(gpu_id64);
> + gpu_id->ver.major = GPU_WIDE_VER_MAJOR(gpu_id64);
> + gpu_id->ver.minor = GPU_WIDE_VER_MINOR(gpu_id64);
> + gpu_id->ver.status = GPU_WIDE_VER_STATUS(gpu_id64);
> + }
I'd probably move the !has_wide_id() logic to an else branch instead of
assigning unconditionally, and then fixing up if has_wide_id() is true:
if (GPU_ARCH_MAJOR(gpu_id32) == GPU_WIDE_COMPAT) {
u64 gpu_id64 = gpu_read64(ptdev->iomem, GPU_WIDE_ID);
if (!gpu_id64)
return -ENXIO;
ptdev->gpu_info.gpu_wide_id = gpu_id64;
gpu_id->arch.major = GPU_WIDE_ARCH_MAJOR(gpu_id64);
gpu_id->arch.minor = GPU_WIDE_ARCH_MINOR(gpu_id64);
gpu_id->arch.rev = GPU_WIDE_ARCH_REV(gpu_id64);
gpu_id->prod_major = GPU_WIDE_PROD_MAJOR(gpu_id64);
gpu_id->ver.major = GPU_WIDE_VER_MAJOR(gpu_id64);
gpu_id->ver.minor = GPU_WIDE_VER_MINOR(gpu_id64);
gpu_id->ver.status = GPU_WIDE_VER_STATUS(gpu_id64);
} else {
ptdev->gpu_info.gpu_id = gpu_id32;
gpu_id->arch.major = GPU_ARCH_MAJOR(gpu_id32);
gpu_id->arch.minor = GPU_ARCH_MINOR(gpu_id32);
gpu_id->arch.rev = GPU_ARCH_REV(gpu_id32);
gpu_id->prod_major = GPU_PROD_MAJOR(gpu_id32);
gpu_id->ver.major = GPU_VER_MAJOR(gpu_id32);
gpu_id->ver.minor = GPU_VER_MINOR(gpu_id32);
gpu_id->ver.status = GPU_VER_STATUS(gpu_id32);
}
>
> return 0;
> }
> diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
> index 0e455d91e77d..04fc9f133152 100644
> --- a/include/uapi/drm/panthor_drm.h
> +++ b/include/uapi/drm/panthor_drm.h
> @@ -373,6 +373,16 @@ struct drm_panthor_gpu_info {
>
> /** @gpu_features: Bitmask describing supported GPU-wide features */
> __u64 gpu_features;
> +
> + /** @gpu_wide_id: 64-bit GPU_ID for v15 onwards. */
Specify that it's zero on v14- HW, and also update the gpu_id doc to
mention it will be zero on v15+.
> + __u64 gpu_wide_id;
> +#define DRM_PANTHOR_WIDE_ARCH_MAJOR(x) (((x) >> 56) & 0xff)
> +#define DRM_PANTHOR_WIDE_ARCH_MINOR(x) (((x) >> 48) & 0xff)
> +#define DRM_PANTHOR_WIDE_ARCH_REV(x) (((x) >> 40) & 0xff)
> +#define DRM_PANTHOR_WIDE_PRODUCT_MAJOR(x) (((x) >> 32) & 0xff)
> +#define DRM_PANTHOR_WIDE_VERSION_MAJOR(x) (((x) >> 16) & 0xff)
> +#define DRM_PANTHOR_WIDE_VERSION_MINOR(x) (((x) >> 8) & 0xff)
> +#define DRM_PANTHOR_WIDE_VERSION_STATUS(x) ((x) & 0xff)
> };
>
> /**
next prev parent reply other threads:[~2026-06-08 13:28 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 15:05 [RFC PATCH 00/18] drm/panthor: Add Mali v15 AM virtualization support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 01/18] drm/panthor: Ignore -EOPNOTSUPP for shader-present nvmem lookup Karunika Choo
2026-06-08 13:06 ` Boris Brezillon
2026-06-08 16:06 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 02/18] drm/panthor: Move register access helpers out of panthor_device.h Karunika Choo
2026-06-08 13:07 ` Boris Brezillon
2026-06-10 15:50 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 03/18] drm/panthor: Parse and store GPU_ID fields Karunika Choo
2026-06-08 13:08 ` Boris Brezillon
2026-06-10 15:57 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 04/18] drm/panthor: Add 64-bit GPU_ID decoding for v15 GPUs Karunika Choo
2026-06-08 13:28 ` Boris Brezillon [this message]
2026-06-10 16:02 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 05/18] drm/panthor: Move register base offsets to the HW description Karunika Choo
2026-06-08 13:32 ` Boris Brezillon
2026-06-08 13:41 ` Boris Brezillon
2026-05-28 15:05 ` [RFC PATCH 06/18] drm/panthor: Derive MMU AS register addresses from base and stride Karunika Choo
2026-06-08 13:45 ` Boris Brezillon
2026-06-11 14:45 ` Steven Price
2026-06-11 16:11 ` Karunika Choo
2026-06-12 15:58 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 07/18] drm/panthor: Add Mali v15 hardware support Karunika Choo
2026-06-08 13:59 ` Boris Brezillon
2026-06-11 15:18 ` Steven Price
2026-06-11 16:04 ` Karunika Choo
2026-06-12 16:01 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 08/18] drm/panthor: Skip devfreq when no OPP table is present Karunika Choo
2026-06-08 14:08 ` Boris Brezillon
2026-06-08 14:39 ` Karunika Choo
2026-06-08 14:51 ` Boris Brezillon
2026-06-11 15:34 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 09/18] drm/panthor: Add basic AM_SYSTEM support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 10/18] drm/panthor: Add AM_PARTITION_CONTROL support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 11/18] drm/panthor: Add AM message helpers Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 12/18] drm/panthor: Add AM_RESOURCE_GROUP support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 13/18] drm/panthor: Add arbitration scheduler Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 14/18] drm/panthor: Route arbitration events Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 15/18] drm/panthor: Add access-window support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 16/18] drm/panthor: Synchronize HW component PM transitions Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 17/18] drm/panthor: Route HW component PM through access windows Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 18/18] drm/panthor: Tolerate access-window loss during HW waits Karunika Choo
2026-06-08 16:27 ` [RFC PATCH 00/18] drm/panthor: Add Mali v15 AM virtualization support Boris Brezillon
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