From: Steven Price <steven.price@arm.com>
To: Karunika Choo <karunika.choo@arm.com>, dri-devel@lists.freedesktop.org
Cc: nd@arm.com, Boris Brezillon <boris.brezillon@collabora.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 07/18] drm/panthor: Add Mali v15 hardware support
Date: Thu, 11 Jun 2026 16:18:44 +0100 [thread overview]
Message-ID: <99c5c33c-3c68-49a8-b827-c3fa210e8b13@arm.com> (raw)
In-Reply-To: <20260528150546.3168527-8-karunika.choo@arm.com>
On 28/05/2026 16:05, Karunika Choo wrote:
> Add the panthor hardware description for Mali v15 GPUs and hook it into
> device matching.
>
> This includes the v15 register map and product identification needed to
> populate the GPU information exposed by the driver and its uAPI.
>
> Add compatibility string for v15 GPUs.
>
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
> drivers/gpu/drm/panthor/panthor_drv.c | 1 +
> drivers/gpu/drm/panthor/panthor_fw.c | 1 +
> .../drm/panthor/panthor_gpu_discover_regs.h | 25 ++++++
> drivers/gpu/drm/panthor/panthor_heap.c | 3 +-
> drivers/gpu/drm/panthor/panthor_hw.c | 81 ++++++++++++++++++-
> drivers/gpu/drm/panthor/panthor_hw.h | 13 +++
> include/uapi/drm/panthor_drm.h | 10 ++-
> 7 files changed, 128 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c
> index e8dc4096c1d2..21644a60c8e4 100644
> --- a/drivers/gpu/drm/panthor/panthor_drv.c
> +++ b/drivers/gpu/drm/panthor/panthor_drv.c
> @@ -1875,6 +1875,7 @@ static const struct of_device_id dt_match[] = {
> { .compatible = "mediatek,mt8196-mali", .data = &soc_data_mediatek_mt8196, },
> { .compatible = "rockchip,rk3588-mali" },
> { .compatible = "arm,mali-valhall-csf" },
> + { .compatible = "arm,mali-gen5-am" },
Just a heads up: a new DT compatible should have a binding document
describing it. So this can't be merged until the DT bindings change is
agreed.
> {}
> };
> MODULE_DEVICE_TABLE(of, dt_match);
> diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
> index f6381f5f236f..e2a511b741f4 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw.c
> +++ b/drivers/gpu/drm/panthor/panthor_fw.c
> @@ -1529,3 +1529,4 @@ MODULE_FIRMWARE("arm/mali/arch11.8/mali_csffw.bin");
> MODULE_FIRMWARE("arm/mali/arch12.8/mali_csffw.bin");
> MODULE_FIRMWARE("arm/mali/arch13.8/mali_csffw.bin");
> MODULE_FIRMWARE("arm/mali/arch14.8/mali_csffw.bin");
> +MODULE_FIRMWARE("arm/mali/arch15.8/mali_csffw.bin");
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
> index 54bb104902ee..9c64676dc35a 100644
> --- a/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_gpu_discover_regs.h
> @@ -14,4 +14,29 @@
> #define GPU_WIDE_VER_MINOR(x) (((x) & GENMASK(15, 8)) >> 8)
> #define GPU_WIDE_VER_STATUS(x) ((x) & GENMASK(7, 0))
>
> +#define DISCOVER_REVIDR 0x8
> +#define DISCOVER_GPU_FEATURES 0x20
> +#define GPU_FEATURES_VARIABLE_RATE_SHADING BIT(0)
> +#define GPU_FEATURES_SIMD_STATE BIT(1)
> +#define GPU_FEATURES_CROSS_STREAM_SYNC BIT(3)
> +#define GPU_FEATURES_NX BIT(4)
> +#define GPU_FEATURES_RAY_TRAVERSAL BIT(5)
> +#define GPU_FEATURES_LD_LEA_TENSOR_INSTRUCTIONS BIT(6)
> +#define DISCOVER_MCU_FEATURES 0x40
> +#define DISCOVER_PRFCNT_FEATURES 0x50
> +#define PRFCNT_FEATURES_COUNTER_BLOCK_SIZE(x) (((x) & GENMASK(7, 0)) << 8)
> +#define DISCOVER_DOORBELL_FEATURES 0x60
> +#define DISCOVER_MEM_FEATURES 0x100
> +#define DISCOVER_MMU_FEATURES 0x108
> +#define MMU_FEATURES_AS_COUNT(x) (((x) & GENMASK(23, 16)) >> 16)
> +#define DISCOVER_AMBA_FEATURES 0x120
> +
> +#define DISCOVER_L2_FEATURES 0x128
> +#define DISCOVER_TILER_FEATURES 0x200
> +#define DISCOVER_CORE_FEATURES 0x300
> +#define DISCOVER_THREAD_FEATURES 0x320
> +#define DISCOVER_THREAD_MAX_THREADS 0x330
> +#define DISCOVER_THREAD_NUM_ACTIVE_GRANULARITY 0x334
> +#define DISCOVER_TEXTURE_FEATURES 0x360
> +
> #endif /* __PANTHOR_GPU_DISCOVER_REGS_H__ */
> diff --git a/drivers/gpu/drm/panthor/panthor_heap.c b/drivers/gpu/drm/panthor/panthor_heap.c
> index 99311abdf1e9..afb7d68abc87 100644
> --- a/drivers/gpu/drm/panthor/panthor_heap.c
> +++ b/drivers/gpu/drm/panthor/panthor_heap.c
> @@ -11,6 +11,7 @@
> #include "panthor_gem.h"
> #include "panthor_gpu_regs.h"
> #include "panthor_heap.h"
> +#include "panthor_hw.h"
> #include "panthor_mmu.h"
>
> /*
> @@ -105,7 +106,7 @@ struct panthor_heap_pool {
>
> static int panthor_heap_ctx_stride(struct panthor_device *ptdev)
> {
> - u32 l2_features = ptdev->gpu_info.l2_features;
> + u64 l2_features = panthor_hw_get_l2_features(ptdev);
> u32 gpu_cache_line_size = GPU_L2_FEATURES_LINE_SIZE(l2_features);
>
> return ALIGN(HEAP_CONTEXT_SIZE, gpu_cache_line_size);
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index e677f1a8f488..52271fb9db52 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> @@ -65,6 +65,23 @@ static struct panthor_hw panthor_hw_arch_v14 = {
> },
> };
>
> +static struct panthor_hw panthor_hw_arch_v15 = {
> + .ops = {
> + .soft_reset = panthor_pwr_reset_soft,
> + .l2_power_off = panthor_pwr_l2_power_off,
> + .l2_power_on = panthor_pwr_l2_power_on,
> + },
> + .map = {
> + .gpu_control_base = 0x3000,
> + .pwr_control_base = 0x3800,
> + .mcu_control_base = 0x3100,
> + .mmu_as = {
> + .base = 0x2800,
> + .stride = 0x80,
> + },
> + },
> +};
> +
> static struct panthor_hw_entry panthor_hw_match[] = {
> {
> .arch_min = 10,
> @@ -76,6 +93,11 @@ static struct panthor_hw_entry panthor_hw_match[] = {
> .arch_max = 14,
> .hwdev = &panthor_hw_arch_v14,
> },
> + {
> + .arch_min = 15,
> + .arch_max = 15,
> + .hwdev = &panthor_hw_arch_v15,
> + }
> };
>
> static int panthor_hw_set_power_tracing(struct device *dev, void *data)
> @@ -187,6 +209,12 @@ static char *get_gpu_model_name(struct panthor_device *ptdev)
> return "Mali-G1-Premium";
> case GPU_PROD_ID_MAKE(14, 3):
> return "Mali-G1-Pro";
> + case GPU_PROD_ID_MAKE(15, 0):
> + return "Mali-G2-Ultra";
> + case GPU_PROD_ID_MAKE(15, 1):
> + return "Mali-G2-Premium";
> + case GPU_PROD_ID_MAKE(15, 3):
> + return "Mali-G2-Pro";
> }
>
> return "(Unknown Mali GPU)";
> @@ -210,7 +238,7 @@ static int overload_shader_present(struct panthor_device *ptdev)
> return 0;
> }
>
> -static int panthor_gpu_info_init(struct panthor_device *ptdev)
> +static void panthor_gpu_info_v10_init(struct panthor_device *ptdev)
> {
> unsigned int i;
>
> @@ -251,12 +279,56 @@ static int panthor_gpu_info_init(struct panthor_device *ptdev)
> ptdev->gpu_info.tiler_present = gpu_read64(gpu_iomem, GPU_TILER_PRESENT);
> ptdev->gpu_info.l2_present = gpu_read64(gpu_iomem, GPU_L2_PRESENT);
> }
> +}
> +
> +static void panthor_gpu_info_v15_init(struct panthor_device *ptdev)
> +{
> + void __iomem *pwr_iomem = ptdev->iomem + ptdev->hw->map.pwr_control_base;
> + u64 texture_features;
> +
> + ptdev->gpu_info.gpu_rev_wide = gpu_read64(ptdev->iomem, DISCOVER_REVIDR);
> + ptdev->gpu_info.l2_features_wide = gpu_read64(ptdev->iomem, DISCOVER_L2_FEATURES);
> +
> + texture_features = gpu_read64(ptdev->iomem, DISCOVER_TEXTURE_FEATURES);
> + ptdev->gpu_info.texture_features[0] = lower_32_bits(texture_features);
> + ptdev->gpu_info.texture_features[1] = upper_32_bits(texture_features);
> +
> + ptdev->gpu_info.thread_features = gpu_read(ptdev->iomem, DISCOVER_THREAD_FEATURES);
> + ptdev->gpu_info.max_threads = gpu_read(ptdev->iomem, DISCOVER_THREAD_MAX_THREADS);
> + ptdev->gpu_info.thread_num_active_granularity =
> + gpu_read(ptdev->iomem, DISCOVER_THREAD_NUM_ACTIVE_GRANULARITY);
> +
> + ptdev->gpu_info.gpu_features = gpu_read64(ptdev->iomem, DISCOVER_GPU_FEATURES);
> +
> + /* The following _HI registers do not contain any information (yet) */
This is a little confusing as a comment - there are no "_HI" registers
mentioned. I think this would be better reworded as "32 bit reads are
used as the HI part of the 64 bit register does not contian any
information (yet)" (or similar).
Or alternatively you could just upgrade these to 64 bit and be done with
it ;)
> + ptdev->gpu_info.mem_features = gpu_read(ptdev->iomem, DISCOVER_MEM_FEATURES);
> + ptdev->gpu_info.mmu_features = gpu_read(ptdev->iomem, DISCOVER_MMU_FEATURES);
> + ptdev->gpu_info.coherency_features = gpu_read(ptdev->iomem, DISCOVER_AMBA_FEATURES);
> + ptdev->gpu_info.tiler_features = gpu_read(ptdev->iomem, DISCOVER_TILER_FEATURES);
> + ptdev->gpu_info.core_features = gpu_read(ptdev->iomem, DISCOVER_CORE_FEATURES);
> +
> + /* AS_PRESENT register removed on v15+ create virtual mask from MMU_FEATURES.AS_COUNT */
> + ptdev->gpu_info.as_present =
> + (1U << MMU_FEATURES_AS_COUNT(ptdev->gpu_info.mmu_features)) - 1;
This might be better expressed using GENMASK:
GENMASK(MMU_FEATURES_AS_COUNT(ptdev->gpu_info.mmu_features) - 1, 0)
> +
> + ptdev->gpu_info.l2_present = gpu_read64(pwr_iomem, PWR_L2_PRESENT);
> + ptdev->gpu_info.tiler_present = gpu_read64(pwr_iomem, PWR_TILER_PRESENT);
> + ptdev->gpu_info.shader_present = gpu_read64(pwr_iomem, PWR_SHADER_PRESENT);
> +}
> +
> +static int panthor_gpu_info_init(struct panthor_device *ptdev)
> +{
> + if (panthor_hw_has_gpu_discover(ptdev))
> + panthor_gpu_info_v15_init(ptdev);
> + else
> + panthor_gpu_info_v10_init(ptdev);
>
> return overload_shader_present(ptdev);
> }
>
> static int panthor_hw_info_init(struct panthor_device *ptdev)
> {
> + u64 l2_features = ptdev->gpu_info.l2_features;
> u32 major, minor, status;
> int ret;
>
> @@ -268,14 +340,17 @@ static int panthor_hw_info_init(struct panthor_device *ptdev)
> minor = ptdev->gpu_id.ver.minor;
> status = ptdev->gpu_id.ver.status;
>
> + if (panthor_hw_has_gpu_discover(ptdev))
> + l2_features = ptdev->gpu_info.l2_features_wide;
> +
> drm_info(&ptdev->base,
> "%s id 0x%x major 0x%x minor 0x%x status 0x%x",
> get_gpu_model_name(ptdev), ptdev->gpu_id.prod_major,
> major, minor, status);
>
> drm_info(&ptdev->base,
> - "Features: L2:%#x Tiler:%#x Mem:%#x MMU:%#x AS:%#x",
> - ptdev->gpu_info.l2_features,
> + "Features: L2:%#llx Tiler:%#x Mem:%#x MMU:%#x AS:%#x",
> + l2_features,
> ptdev->gpu_info.tiler_features,
> ptdev->gpu_info.mem_features,
> ptdev->gpu_info.mmu_features,
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
> index 0ae11b78c77e..1b2678ea00db 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.h
> +++ b/drivers/gpu/drm/panthor/panthor_hw.h
> @@ -83,4 +83,17 @@ static inline bool panthor_hw_has_pwr_ctrl(struct panthor_device *ptdev)
> return ptdev->gpu_id.arch.major >= 14;
> }
>
> +static inline bool panthor_hw_has_gpu_discover(struct panthor_device *ptdev)
> +{
> + return ptdev->gpu_id.arch.major >= 15;
> +}
> +
> +static inline u64 panthor_hw_get_l2_features(struct panthor_device *ptdev)
> +{
> + if (panthor_hw_has_gpu_discover(ptdev))
> + return ptdev->gpu_info.l2_features_wide;
> +
> + return ptdev->gpu_info.l2_features;
> +}
> +
> #endif /* __PANTHOR_HW_H__ */
> diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
> index 04fc9f133152..2ecc50eade27 100644
> --- a/include/uapi/drm/panthor_drm.h
> +++ b/include/uapi/drm/panthor_drm.h
> @@ -368,8 +368,8 @@ struct drm_panthor_gpu_info {
> /** @core_features: Used to discriminate core variants when they exist. */
> __u32 core_features;
>
> - /** @pad: MBZ. */
> - __u32 pad;
> + /** @thread_num_active_granularity: Granularity of number of active threads */
> + __u32 thread_num_active_granularity;
>
> /** @gpu_features: Bitmask describing supported GPU-wide features */
> __u64 gpu_features;
> @@ -383,6 +383,12 @@ struct drm_panthor_gpu_info {
> #define DRM_PANTHOR_WIDE_VERSION_MAJOR(x) (((x) >> 16) & 0xff)
> #define DRM_PANTHOR_WIDE_VERSION_MINOR(x) (((x) >> 8) & 0xff)
> #define DRM_PANTHOR_WIDE_VERSION_STATUS(x) ((x) & 0xff)
> +
> + /** @gpu_rev_wide: 64-bit GPU revision for v15 onwards */
> + __u64 gpu_rev_wide;
> +
> + /** @l2_features_wide: 64-bit L2_FEATURES for v15 onwards */
> + __u64 l2_features_wide;
> };
>
> /**
next prev parent reply other threads:[~2026-06-11 15:18 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 15:05 [RFC PATCH 00/18] drm/panthor: Add Mali v15 AM virtualization support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 01/18] drm/panthor: Ignore -EOPNOTSUPP for shader-present nvmem lookup Karunika Choo
2026-06-08 13:06 ` Boris Brezillon
2026-06-08 16:06 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 02/18] drm/panthor: Move register access helpers out of panthor_device.h Karunika Choo
2026-06-08 13:07 ` Boris Brezillon
2026-06-10 15:50 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 03/18] drm/panthor: Parse and store GPU_ID fields Karunika Choo
2026-06-08 13:08 ` Boris Brezillon
2026-06-10 15:57 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 04/18] drm/panthor: Add 64-bit GPU_ID decoding for v15 GPUs Karunika Choo
2026-06-08 13:28 ` Boris Brezillon
2026-06-10 16:02 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 05/18] drm/panthor: Move register base offsets to the HW description Karunika Choo
2026-06-08 13:32 ` Boris Brezillon
2026-06-08 13:41 ` Boris Brezillon
2026-05-28 15:05 ` [RFC PATCH 06/18] drm/panthor: Derive MMU AS register addresses from base and stride Karunika Choo
2026-06-08 13:45 ` Boris Brezillon
2026-06-11 14:45 ` Steven Price
2026-06-11 16:11 ` Karunika Choo
2026-06-12 15:58 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 07/18] drm/panthor: Add Mali v15 hardware support Karunika Choo
2026-06-08 13:59 ` Boris Brezillon
2026-06-11 15:18 ` Steven Price [this message]
2026-06-11 16:04 ` Karunika Choo
2026-06-12 16:01 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 08/18] drm/panthor: Skip devfreq when no OPP table is present Karunika Choo
2026-06-08 14:08 ` Boris Brezillon
2026-06-08 14:39 ` Karunika Choo
2026-06-08 14:51 ` Boris Brezillon
2026-06-11 15:34 ` Steven Price
2026-05-28 15:05 ` [RFC PATCH 09/18] drm/panthor: Add basic AM_SYSTEM support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 10/18] drm/panthor: Add AM_PARTITION_CONTROL support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 11/18] drm/panthor: Add AM message helpers Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 12/18] drm/panthor: Add AM_RESOURCE_GROUP support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 13/18] drm/panthor: Add arbitration scheduler Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 14/18] drm/panthor: Route arbitration events Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 15/18] drm/panthor: Add access-window support Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 16/18] drm/panthor: Synchronize HW component PM transitions Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 17/18] drm/panthor: Route HW component PM through access windows Karunika Choo
2026-05-28 15:05 ` [RFC PATCH 18/18] drm/panthor: Tolerate access-window loss during HW waits Karunika Choo
2026-06-08 16:27 ` [RFC PATCH 00/18] drm/panthor: Add Mali v15 AM virtualization support Boris Brezillon
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