* [PATCH] riscv: kvm: Skip preventive hfence.gvma for new G-stage mappings with Svvptc
@ 2026-07-01 7:52 Dylan.Wu
2026-07-13 12:39 ` Anup Patel
0 siblings, 1 reply; 2+ messages in thread
From: Dylan.Wu @ 2026-07-01 7:52 UTC (permalink / raw)
To: anup, palmer
Cc: atish.patra, pjw, aou, alex, zhouquan, kvm, kvm-riscv,
linux-riscv, linux-kernel, Dylan.Wu
For Invalid->Valid G-stage leaf PTE updates, the flush in
kvm_riscv_gstage_set_pte() is preventive. When Svvptc is available, new
valid PTEs become visible to the page-table walker within a bounded
time, so an immediate hfence.gvma is unnecessary.
Skip gstage_tlb_flush() for that case. Permission-restricting updates
continue to use the existing flush path.
Assisted-by: YuanSheng: deepseek-v4-pro
Co-developed-by: Quan Zhou <zhouquan@iscas.ac.cn>
Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Signed-off-by: Dylan.Wu <fredwudi0305@gmail.com>
---
arch/riscv/kvm/gstage.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c
index c4c3b7956..7b805112d 100644
--- a/arch/riscv/kvm/gstage.c
+++ b/arch/riscv/kvm/gstage.c
@@ -10,6 +10,8 @@
#include <linux/module.h>
#include <linux/pgtable.h>
#include <asm/kvm_gstage.h>
+#include <asm/cpufeature.h>
+#include <asm/hwcap.h>
#ifdef CONFIG_64BIT
unsigned long kvm_riscv_gstage_max_pgd_levels __ro_after_init = 3;
@@ -171,8 +173,11 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage,
}
if (pte_val(*ptep) != pte_val(map->pte)) {
+ bool was_invalid = !pte_val(*ptep);
set_pte(ptep, map->pte);
- if (gstage_pte_leaf(ptep))
+ if (gstage_pte_leaf(ptep) &&
+ !(was_invalid &&
+ riscv_has_extension_unlikely(RISCV_ISA_EXT_SVVPTC)))
gstage_tlb_flush(gstage, current_level, map->addr);
}
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] riscv: kvm: Skip preventive hfence.gvma for new G-stage mappings with Svvptc
2026-07-01 7:52 [PATCH] riscv: kvm: Skip preventive hfence.gvma for new G-stage mappings with Svvptc Dylan.Wu
@ 2026-07-13 12:39 ` Anup Patel
0 siblings, 0 replies; 2+ messages in thread
From: Anup Patel @ 2026-07-13 12:39 UTC (permalink / raw)
To: Dylan.Wu
Cc: palmer, atish.patra, pjw, aou, alex, zhouquan, kvm, kvm-riscv,
linux-riscv, linux-kernel
On Wed, Jul 1, 2026 at 1:23 PM Dylan.Wu <fredwudi0305@gmail.com> wrote:
>
> For Invalid->Valid G-stage leaf PTE updates, the flush in
> kvm_riscv_gstage_set_pte() is preventive. When Svvptc is available, new
> valid PTEs become visible to the page-table walker within a bounded
> time, so an immediate hfence.gvma is unnecessary.
>
> Skip gstage_tlb_flush() for that case. Permission-restricting updates
> continue to use the existing flush path.
>
> Assisted-by: YuanSheng: deepseek-v4-pro
> Co-developed-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
> Signed-off-by: Dylan.Wu <fredwudi0305@gmail.com>
The patch subject is unnecessarily long and needs some simplification.
Also, there is minor warning reported by checkpatch.pl related to
include of asm/cpufeature.h. I will take care of both of these at the
time of merging this patch.
Reviewed-by: Anup Patel <anup@brainfault.org>
Queued this patch as a fix for Linux-7.2-rcX
Thanks,
Anup
> ---
> arch/riscv/kvm/gstage.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c
> index c4c3b7956..7b805112d 100644
> --- a/arch/riscv/kvm/gstage.c
> +++ b/arch/riscv/kvm/gstage.c
> @@ -10,6 +10,8 @@
> #include <linux/module.h>
> #include <linux/pgtable.h>
> #include <asm/kvm_gstage.h>
> +#include <asm/cpufeature.h>
> +#include <asm/hwcap.h>
>
> #ifdef CONFIG_64BIT
> unsigned long kvm_riscv_gstage_max_pgd_levels __ro_after_init = 3;
> @@ -171,8 +173,11 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage,
> }
>
> if (pte_val(*ptep) != pte_val(map->pte)) {
> + bool was_invalid = !pte_val(*ptep);
> set_pte(ptep, map->pte);
> - if (gstage_pte_leaf(ptep))
> + if (gstage_pte_leaf(ptep) &&
> + !(was_invalid &&
> + riscv_has_extension_unlikely(RISCV_ISA_EXT_SVVPTC)))
> gstage_tlb_flush(gstage, current_level, map->addr);
> }
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2026-07-13 12:39 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-07-01 7:52 [PATCH] riscv: kvm: Skip preventive hfence.gvma for new G-stage mappings with Svvptc Dylan.Wu
2026-07-13 12:39 ` Anup Patel
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®